參數(shù)資料
型號： HD66705U
廠商： Hitachi,Ltd.
英文描述： Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver(圖形LCD控制器/驅(qū)動器)
中文描述： 低功耗點(diǎn)陣液晶顯示控制器/驅(qū)動器（圖形液晶顯示控制器/驅(qū)動器）
文件頁數(shù)： 14/81頁
文件大小： 426K
代理商： HD66705U
HD66705U
14
Table 4
Display-Line Modes, Display-Start Line, and DDRAM Addresses
Display-Start Lines
Display-
Line Mode
Duty
Ratio
Common Pins
1st Line
(SN = 000)
2nd Line
(SN = 001)
3rd Line
(SN = 010)
4th Line
(SN = 011)
5th Line
(SN = 100)
1-line
(NL = 0)
1/10
COM1–COM8
00H–0BH
10H–1BH
20H–2BH
30H–3BH
40H–4BH
2-line
(NL = 1)
1/18
COM1–COM8
COM9–COM16
00H–0BH
10H–1BH
10H–1BH
20H–2BH
20H–2BH
30H–3BH
30H–3BH
40H–4BH
40H–4BH
00H–0BH
Character Generator ROM (CGROM)
The character generator ROM generates 5
×
8-dot character patterns from 8-bit character codes (Table 5). It
can generate 240 5
×
8-dot character patterns. User-defined character patterns are also available using a
mask-programmed ROM (see the Modifying Character Patterns section.)
Character Generator RAM (CGRAM)
The character generator RAM of 32
×
5 bits allows the user to redefine the character patterns for user fonts.
In the case of 5
×
8-dot characters, up to four fonts may be redefined.
Write the character codes at addresses 00H to 03H into DDRAM to display the character patterns stored in
CGRAM.
Segment RAM (SEGRAM)
The segment RAM is used to enable control of segments such as an icon and a mark by the user program.
Segments and characters are driven by a multiplexing drive method.
SEGRAM has a capacity of 8
×
5 bits, for controlling the display of a maximum of 40 icons and marks.
While COMS1 and COMS2 outputs are being selected, SEGRAM is read and segments (icons and marks)
are displayed by a multiplexing drive method (20 segments each during COMS1 and COMS2 selection).
Bits in SEGRAM corresponding to segments to be displayed are directly set by the MPU, regardless of the
contents of DDRAM and CGRAM.
Timing Generation Circuit
The timing generation circuit generates timing signals for the operation of internal circuits such as
DDRAM, CGROM, CGRAM, and SEGRAM. RAM read timing for display and internal operation timing
by MPU access are generated separately to avoid interfering with each other. Therefore, when writing data
to DDRAM, for example, there will be no undesirable interferences, such as flickering, in areas other than
the display area.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD66710 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Dot Matrix Liquid Crystal Display Controller/Driver)
HD66710A00FS 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Dot Matrix Liquid Crystal Display Controller/Driver)
HD66710A00TF 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Dot Matrix Liquid Crystal Display Controller/Driver)
HD66712 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Dot-Matrix Liquid Crystal Display Controller/Driver
HD66712A00TA0 制造商:Renesas Electronics Corporation 功能描述:
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