參數(shù)資料
型號: HB52R1289E22-A6B
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 1 GB Registered SDRAM DIMM 1 GB Registered SDRAM DIMM (36 pcs of 64 M 】 4 Components) PC100 SDRAM
中文描述: 128M X 72 SYNCHRONOUS DRAM MODULE, 7.5 ns, DMA168
封裝: DIMM-168
文件頁數(shù): 13/18頁
文件大小: 168K
代理商: HB52R1289E22-A6B
HB52R1289E22-A6B/B6B
Data Sheet E0017H20
13
AC Characteristics
(Ta = 0 to 55°C, V
CC
= 3.3 V ± 0.3 V, V
SS
= 0 V) (cont)
HB52R1289E22
-A6B/B6B
Parameter
Symbol
PC100
Symbol
Min
Max
Unit
Notes
CKE hold time
t
CEH
t
CS
t
CH
Thi
3.0
ns
1
Command setup time
Tsi
2.6
ns
1
Command hold time
Thi
3.0
ns
1
Ref/Active to Ref/Active command period t
RC
Active to precharge command period
Trc
70
ns
1
t
RAS
t
RCD
Tras
50
120000
ns
1
Active command to column command
(same bank)
Trcd
20
ns
1
Precharge to active command period
t
RP
t
DPL
Trp
20
ns
1
Write recovery or data-in to precharge
lead time
Tdpl
20
ns
1
Active (a) to Active (b) command period
t
RRD
t
T
t
REF
Trrd
20
ns
1
Transition time (rise to fall)
1
5
ns
Refresh period
Notes: 1. AC measurement assumes t
T
= 1 ns. Reference level for timing of input signals is 1.5 V.
2. Access time is measured at 1.5 V. Load condition is C
L
= 50 pF.
3. t
LZ
(min) defines the time at which the outputs achieves the low impedance state.
4. t
HZ
(max) defines the time at which the outputs achieves the high impedance state.
5. t
CES
defines CKE setup time to CK rising edge except power down exit command.
64
ms
Test Conditions
Input and output timing reference levels: 1.5 V
Input waveform and output load: See following figures
Ambient illuminance: Under 100 lx
t
T
2.4 V
0.4 V0.8 V
2.0 V
input
t
T
DQ
CL
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