參數(shù)資料
型號(hào): HB52F649E1
廠商: Hitachi,Ltd.
英文描述: 512 MB Registered SDRAM DIMM(512 MB 寄存同步DRAM DIMM)
中文描述: 注冊使用512 MB SDRAM的內(nèi)存(512 MB的寄存同步的DRAM內(nèi)存)
文件頁數(shù): 14/21頁
文件大?。?/td> 163K
代理商: HB52F649E1
HB52F649E1-75B
14
DC Characteristics
(Ta = 0 to 55
°
C, V
CC
= 3.3 V
±
0.3 V, V
SS
= 0 V)
HB52F649E1-75B
Parameter
Symbol Min
Max
Unit Test conditions
Notes
Operating current
I
CC1
2675
mA
Burst length = 1
t
RC
= min
CKE = V
IL
, t
CK
= 12 ns 6
CKE = V
IL
, t
CK
=
1, 2, 3
Standby current in power down I
CC2P
Standby current in power down
(input signal stable)
749
mA
I
CC2PS
731
mA
7
Standby current in non power
down
I
CC2N
1055
mA
CKE,
S
= V
IH
,
t
CK
= 12 ns
CKE = V
IL
, t
CK
= 12 ns 1, 2, 6
4
Active standby current in
power down
I
CC3P
767
mA
Active standby current in non
power down
I
CC3N
1235
mA
CKE,
S
= V
IH
,
t
CK
= 12 ns
t
CK
= min, BL = 4
t
RC
= min
V
IH
V
– 0.2 V
V
IL
0.2 V
0
Vin
V
CC
0
Vout
V
CC
DQ = disable
1, 2, 4
Burst operating current
I
CC4
I
CC5
I
CC6
3035
mA
1, 2, 5
Refresh current
4655
mA
3
Self refresh current
749
mA
8
Input leakage current
I
LI
I
LO
–10
10
μ
A
μ
A
Output leakage current
–10
10
Output high voltage
V
OH
V
OL
2.4
V
I
OH
= –4 mA
I
OL
= 4 mA
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
(max) is specified at the
output open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CK operating current.
7. After power down mode, no CK operating current.
8. After self refresh mode set, self refresh current.
0.4
V
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