參數(shù)資料
型號(hào): HB52E169E12
廠商: Hitachi,Ltd.
英文描述: 128 MB Registered SDRAM DIMM(128 MB 寄存同步DRAM DIMM)
中文描述: 128 MB的注冊(cè)SDRAM的內(nèi)存(128 MB的寄存同步的DRAM內(nèi)存)
文件頁(yè)數(shù): 22/53頁(yè)
文件大?。?/td> 1737K
代理商: HB52E169E12
HB52E169E12-F
22
To [BST]:
This command stops a full-page burst.
To [READ], [READ A]:
Data output by the previous read command continues to be output. After CE la-
tency, the data output resulting from the next command will start.
To [WRIT], [WRIT A]:
These commands stop a burst read, and start a write cycle.
To [ACTV]:
This command makes other banks bank active. (However, an interval of t
RRD
is required.) At-
tempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands stop a burst read, and the SDRAM module enters precharge mode.
From READ with AUTO-PRECHARGE state, command operation
To [DESL], [NOP]:
These commands continue read operations until the burst operation is completed, and
the SDRAM module then enters precharge mode.
To [ACTV]:
This command makes other banks bank active. (However, an interval of t
RRD
is required.) At-
tempting to make the currently active bank active results in an illegal command.
From WRITE state, command operation
To [DESL], [NOP]:
These commands continue write operations until the burst operation is completed.
To [BST]:
This command stops a full-page burst.
To [READ], [READ A]:
These commands stop a burst and start a read cycle.
To [WRIT], [WRIT A]:
These commands stop a burst and start the next write cycle.
To [ACTV]:
This command makes the other bank active. (However, an interval of t
RRD
is required.) At-
tempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands stop burst write and the SDRAM module then enters precharge mode.
From WRITE with AUTO-PRECHARGE state, command operation
To [DESL], [NOP]:
These commands continue write operations until the burst is completed, and the
SDRAM module enters precharge mode.
To [ACTV]:
This command makes the other bank active. (However, an interval of t
RRD
is required.) At-
tempting to make the currently active bank active results in an illegal command.
From REFRESH state, command operation
To [DESL], [NOP], [BST]:
After an auto-refresh cycle (after t
RC
), the SDRAM module automatically enters
the IDLE state.
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