參數(shù)資料
型號(hào): GS74116
廠商: GSI TECHNOLOGY
英文描述: 4Mb(256K x 16Bit)Asynchronous SRAM(4M位(256K x 16位)異步靜態(tài)RAM)
中文描述: 4Mb的(256 × 16Bit的)異步SRAM(4分位(256K × 16位)異步靜態(tài)RAM)的
文件頁數(shù): 6/14頁
文件大?。?/td> 184K
代理商: GS74116
Rev: 2.02 3/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
6/14
1999, Giga Semconductor, Inc.
N
GS74116TP/J/U
AC Characteristics
*These parameters are sampled and are not 100% tested
Read Cycle 1: CE = OE = V
IL
, WE = V
IH
, UB and, or LB = V
IL
Read Cycle
Parameter
Symbol
-8
-10
-12
-15
Unit
Mn
Max
Mn
Max
Mn
Max
Mn
Max
Read cycle time
t
RC
8
---
10
---
12
---
15
---
ns
Address access time
t
AA
---
8
---
10
---
12
---
15
ns
Chip enable access time (CE)
t
AC
---
8
---
10
---
12
---
15
ns
Byte enable access time (UB, LB)
t
AB
---
3.5
---
4
---
5
---
6
ns
Output enable to output valid (OE)
t
OE
---
3.5
---
4
---
5
---
6
ns
Output hold fromaddress change
t
OH
3
---
3
---
3
---
3
---
ns
Chip enable to output in low Z (CE)
t
LZ
*
3
---
3
---
3
---
3
---
ns
Output enable to output in low Z (OE)
t
OLZ
*
0
---
0
---
0
---
0
---
ns
Byte enable to output in low Z (UB, LB)
t
BLZ
*
0
---
0
---
0
---
0
---
ns
Chip disable to output in High Z (CE)
t
HZ
*
---
4
---
5
---
6
---
7
ns
Output disable to output in High Z (OE)
t
OHZ
*
---
3.5
---
4
---
5
---
6
ns
Byte disable to output in High Z (UB, LB)
t
BHZ
*
---
3.5
---
4
---
5
---
6
ns
t
AA
t
OH
t
RC
Address
Data Out
Previous Data
Data valid
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