參數(shù)資料
型號： GS4910B
廠商： Gennum Corporation
英文描述： HD/SD/Graphics Clock and Timing Generator with GENLOCK
中文描述： 高清/標(biāo)清/圖形時鐘和定時發(fā)生器鎖相
文件頁數(shù)： 72/113頁
文件大小： 1017K
代理商： GS4910B
GS4911B/GS4910B Data Sheet
36655 - 2
April 2006
72 of 113
3.9 Custom Clock Generation
In addition to the device’s pre-programmed clock frequencies, the user may
generate a custom audio or video clock by programming designated registers in
the host interface.
Custom video clock generation is supported by both the GS4910B and GS4911B
and is described in
Section 3.9.1 on page 72
. Custom audio clock generation is
only supported by the GS4911B and is described in
Section 3.9.2 on page 73
.
3.9.1 Programming a Custom Video Clock
The fundamental frequency of the video clock is defined by the output video format
initially set by VID_STD[5:0]. At any time, this fundamental frequency may be
modified to create a custom output video format.
The user may generate a video clock with any frequency between 13.5MHz and
165MHz. By programming the PCLK_Divide registers, the output PCLK may be as
low as 13.5/4 = 3.375MHz.
Generating a custom video clock will change the period of the video timing signals
presented to the TIMING_OUT pins; however, the pixels per line, lines per frame,
and other pixel and line-based timing signals will remain unchanged. To redefine
the pixel and line based timing parameters, registers 4Eh to 55h must be
reprogrammed as described in
Section 3.10 on page 74
.
The frequency of the custom video clock is determined using a ratio based on the
27MHz reference. Therefore, to program a custom clock, the user must calculate
and program the set of integers (N
v
, D
v
) in the equation:
where:
f
out
= desired output video clock frequency
f
in
= 27MHz crystal reference
N
v
= numerator of the ratio (host register 20h-21h)
D
v
= denominator of the ratio (host register 22h-23h)
Before programming N
v
and D
v
, the numerator and denominator must be reduced
to their lowest factors. Two examples are given below:
Example 1: Programming an output video clock of 74.25MHz:
Therefore, program N
v
= 11 and D
v
= 4.
N
v
D
v
------
f
f
in
--------
=
f
f
in
--------
MHz
27
MHz
74.25
=
N
v
D
v
------
∴
2700
7425
4
11
=
=
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