參數(shù)資料
型號: GS1531
廠商: Gennum Corporation
英文描述: GS1531 HD-LINX-TM II Multi-Rate Serializer
中文描述: GS1531的HD - LINX進程,商標(biāo)第二多速率串行器
文件頁數(shù): 33/49頁
文件大?。?/td> 500K
代理商: GS1531
GS1531 Data Sheet
30573 - 4
July 2005
33 of 49
4.6.3.2 Illegal Code Remapping
If the ILLEGAL_REMAP bit of the IOPROC_DISABLE register is set LOW, the
GS1531 will remap all codes within the active picture between the values of 3FCh
and 3FFh to 3FBh. All codes within the active picture area between the values of
000h and 003h will be remapped to 004h.
In addition, 8-bit TRS and ancillary data preambles will be remapped to 10-bit
values if this feature is enabled.
4.6.3.3 EDH Generation and Insertion
When operating in SD mode, (SD/HD = HIGH), the GS1531 will generate and
insert complete EDH packets into the data stream. Packet generation and insertion
will only take place if the EDH_CRC_INS bit of the IOPROC_DISABLE register is
set LOW.
The GS1531 will generate all of the required EDH packet data including all ancillary
data preambles, (DID, DBN, DC), reserved code words and checksum. Calculation
of both full field (FF) and active picture (AP) CRC's will be carried out by the device.
SMPTE RP165 specifies the calculation ranges and scope of EDH data for
standard 525 and 625 component digital interfaces. The GS1531 will utilize these
standard ranges by default.
If the received video format does not correspond to 525 or 625 digital component
video standards as determined by the flywheel pixel and line counters, then one of
two schemes for determining the EDH calculation ranges will be employed:
1. Ranges will be based on the line and pixel ranges programmed by the host
interface; or
2. In the absence of user-programmed calculation ranges, ranges will be
determined from the received TRS ID words or supplied H, V, and F timing
signals, see
Internal Flywheel on page 25
.
Table 4-7: Host Interface Description for SMPTE 352M Payload Identifier Registers
Register Name
Bit
Name
Description
R/W
Default
VIDEO_FORMAT_B
Address: 00Bh
15-8
SMPTE352M
Byte 4
SMPTE 352M Byte 4 information must be
programmed in this register when 352M_INS =
LOW.
R/W
0
7-0
SMPTE352M
Byte 3
SMPTE 352M Byte 3 information must be
programmed in this register when 352M_INS =
LOW.
R/W
0
VIDEO_FORMAT_A
Address: 00Ah
15-8
SMPTE352M
Byte 2
SMPTE 352M Byte 2 information must be
programmed in this register when 352M_INS =
LOW.
R/W
0
7-0
SMPTE 352M
Byte 1
SMPTE 352M Byte 1 information must be
programmed in this register when 352M_INS =
LOW.
R/W
0
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