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| 型號(hào)： | GMS82524T |
| 英文描述： | [General Purpose(1) : ADC/ LED/ SCI/ PWM] |
| 中文描述： | [通用（1）：藝術(shù)發(fā)展局/發(fā)光/工商/脈寬調(diào)制] |
| 文件頁(yè)數(shù)： | 46/110頁(yè) |
| 文件大?。?/td> | 1980K |
| 代理商： | GMS82524T |
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GMS81508B/16B/24B, GMS82512/16/24
MAY. 2001 Ver 2.0
43
8-bit Timer Mode
In the timer mode, the internal clock is used for counting
up. Thus, you can think of it as counting internal clock in-
put. The contents of TDR
n
are compared with the contents
of up-counter, T
n
. If match is found, a timer 1 interrupt
(T1IF) is generated and the up-counter is cleared to 0.
Counting up is resumed after the up-counter is cleared.
As the value of TDR
n
is changeable by software, time in-
terval is set as you want
Figure 11-4 Timer Mode Timing Chart
Figure 11-5 Timer Count Example
Value of
TM[1:0]
Clock
Source
Resolution
(At
f
XIN
=8 MHz)
Maximum Time
Setting
(At
f
XIN
=8 MHz)
00
01
10
11
f
EC1
f
XIN
÷
4
f
XIN
÷
16
f
XIN
÷
64
1/f
EC1
0.5
2
8
sec
us
us
us
1/f
EC1
×
256
128
512
2048
sec
us
us
us
Table 11-1 Timer Source clock Interrupt Time
0
n-2
2
0
n
3
n-1
n
Source clock
Up-counter
TDR1
T1IF interrupt
Start count
1
2
3
1
4
Match
Detect
Counter
Clear
~
~
~
~
~
~
Timer 1 (T1IF)
Interrupt
TDR1
TIME
Occur interrupt
Occur interrupt
Occur interrupt
Interrupt period
= 8
μ
s x 125
upcoun
~
~
0
1
2
3
4
5
6
7A
7D
7C
Count Pulse
Period
7B
MATCH
(TDR0 = T0)
Example:
Make 1ms interrupt using by Timer0 at 8MHz
LDM
LDM
SET1
EI
TM0,#1FH
TDR0,#125
T0E
; divide by 64
; 8us x 125= 1ms
; Enable Timer 0 Interrupt
; Enable Master Interrupt
When
TDR0 = 125
D
= 7D
H
f
XIN
= 8 MHz
INTERRUPT PERIOD =
8
×
106 Hz
1
×
64
×
125 = 1 ms
TM0 = 0001 1111
B
(8-bit Timer mode, Prescaler divide ratio = 64)
8
μ
s
7D
0
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