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| 型號(hào)： | GMS82524T |
| 英文描述： | [General Purpose(1) : ADC/ LED/ SCI/ PWM] |
| 中文描述： | [通用（1）：藝術(shù)發(fā)展局/發(fā)光/工商/脈寬調(diào)制] |
| 文件頁(yè)數(shù)： | 40/110頁(yè) |
| 文件大?。?/td> | 1980K |
| 代理商： | GMS82524T |
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GMS81508B/16B/24B, GMS82512/16/24
MAY. 2001 Ver 2.0
37
10. BASIC INTERVAL TIMER
The GMS815xxB and GMS825xx have one 8-bit Basic In-
terval Timer that is free-run and can not stop. Block dia-
gram is shown in Figure 10-1.
In addition, the Basic Interval Timer generates the time
base for watchdog timer counting. It also provides a Basic
interval timer interrupt (BITIF). As the count overflow
from FF
H
to 00
H
, this overflow causes the interrupt to be
generated. The Basic Interval Timer is controlled by the
clock control register (CKCTLR) shown in Figure 10-2.
Source clock can be selected by lower 3 bits of CKCTLR.
BITR and CKCTLR are located at same address, and ad-
dress 0F9
H
is read as a BITR, and written to CKCTLR.
Figure 10-1 Block Diagram of Basic Interval Timer
Table 10-1 Basic Interval Timer Interrupt Time
MUX
Basic Interval Timer Interrupt
BITR
Select Input clock 3
Basic Interval Timer
clock control register
source
clock
8-bit up-counter
BTS[2:0]
BTCL
÷
2048
÷
1024
÷
512
÷
256
÷
128
÷
64
÷
32
÷
16
To Watchdog timer (WDTCK)
CKCTLR
clear
overflow
Internal bus line
[0D3
H
]
[0F9
H
]
BITIF
Read
X
IN
PIN
P
CKCTLR
[2:0]
Source clock
Interrupt (overflow) Period (ms)
@ f
XIN
= 8MHz
000
001
010
011
100
101
110
111
f
XIN
÷
16
f
XIN
÷
32
f
XIN
÷
64
f
XIN
÷
128
f
XIN
÷
256
f
XIN
÷
512
f
XIN
÷
1024
f
XIN
÷
2048
0.512
1.024
2.048
4.096
8.192
16.384
32.768
65.536
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