參數(shù)資料
型號: GM72V66841ET-7K
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 2,097,152 WORD x 8 BIT x 4 BANK SYNCHRONOUS DYNAMIC RAM
中文描述: 8M X 8 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, TSOP2-54
文件頁數(shù): 28/57頁
文件大?。?/td> 592K
代理商: GM72V66841ET-7K
LG Semicon
GM72V66841CT/CLT
WRITE to WRITE Command Interval (different bank)
Read command to Write command interval:
1.
Same bank, same Row address:
read command, the write command can be
performed after an interval of no less than 1
cycle. However, DQM, DQMU/DQML must be
set High-Z so that the output buffer becomes
High-Z before data input.
When the write command is executed at the same
ROW address of the same bank as the preceding
27
READ to WRITE Command Interval (1)
CLK
Command
DQM,
DQMU
/DQML
CL=2
CL=3
Din
in B1
in B2
in B3
Burst Length = 4
Burst Write
WRIT
in B0
READ
Dout
High-Z
Din
in B3
in B1
in B2
Burst Write Mode
Burst Length = 4
CLK
Command
Address
(A0-A11)
BS(A12/A13)
in A0
in B0
ACTV
ACTV
WRIT
Row 0
Row 1
C
olumn A
WRIT
C
olumn B
Bank0
Active
Bank3
Active
Bank0
Write
Bank3
Write
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