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參數(shù)資料
| 型號(hào)： | GFD35N03 |
| 英文描述： | TRANSISTOR | MOSFET | N-CHANNEL | 30V V(BR)DSS | 53A I(D) | TO-252AA |
| 中文描述： | 晶體管| MOSFET的| N溝道| 30V的五（巴西）直|第53A條（?。﹟對(duì)252AA |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大小： | 59K |
| 代理商： | GFD35N03 |
GFD35N03
Vishay Semiconductor
www.vishay.com
2
Document Number 74558
20-Dec-01
Electrical Characteristics
(T
J
= 25
°
C unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Symbol
Test Condition
Min
Typ
Max
Unit
BV
DSS
V
GS(th)
I
GSS
V
GS
= 0V, I
D
= 250
μ
A
V
DS
= V
GS
, I
D
= 250
μ
A
V
GS
= ±20V, V
DS
= 0V
V
DS
= 24V, V
GS
= 0V
V
DS
= 24V, V
GS
= 0V, T
J
= 125
°
C
V
DS
≥
5V, V
GS
= 10V
V
GS
= 10V, I
D
= 25A
V
GS
= 4.5V, I
D
= 20A
V
DS
= 10V, I
D
= 25A
30
1.0
–
–
–
53
–
–
–
–
–
–
–
–
–
8
–
V
V
nA
3.0
±100
1
10
–
10
15.5
–
Zero Gate Voltage Drain Current
I
DSS
μ
A
On-State Drain Current
(1)
I
D(on)
A
Drain-Source On-State Resistance
(1)
R
DS(on)
m
12.5
40
Forward Transconductance
(1)
Dynamic
g
fs
S
Total Gate Charge
(1)
Q
g
V
DS
=15V, V
GS
=5.0V, I
D
=25A
–
–
–
–
–
–
–
–
–
–
–
21
38
7
7.5
15
13
70
31
2204
446
219
25
50
–
–
25
20
100
50
–
–
–
Gate-Source Charge
(1)
Gate-Drain Charge
(1)
Turn-On Delay Time
(1)
Rise Time
(1)
Turn-Off Delay Time
(1)
Fall Time
(1)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Source-Drain Diode
Max. Diode Forward Current
Max. Pulsed Diode Forward Current
(2)
Diode Forward Voltage
(1)
Reverse Recovery Time
(1)
Peak Reverse Recovery Current
(1)
Reverse Recovery Charge
(1)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
V
DS
= 15V, V
GS
= 10V
I
D
= 25A
nC
V
DD
= 15V
I
D
1A, V
GEN
= 10V
R
G
= 6
ns
V
GS
= 0V
V
DS
= 15V
f = 1.0MH
Z
pF
I
S
I
SM
V
SD
t
rr
I
RRM
Q
rr
–
–
–
–
–
–
–
–
–
–
35
150
1.3
–
–
–
A
A
V
ns
A
nC
I
S
= 20A, V
GS
= 0V
0.87
159
3.3
282
I
F
= 20A, di/dt = 100A/
μ
s
Note:
(1) Pulse test; pulse width
≤
300
μ
s, duty cycle
≤
2%
(2) Pulse width limited by maximum junction temperature
G
D
S
V
IN
V
GEN
R
G
R
D
V
OUT
DUT
Input, V
IN
t
d(on)
Output, V
OUT
t
on
t
r
t
d(off)
t
off
t
f
INVERTED
90%
10%
10%
90 %
50%
50%
10%
90%
PULSE WIDTH
Switching
Test Circuit
Switching
Waveforms
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