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參數(shù)資料
| 型號： | FX839 |
| 英文描述： | Analogue Control Interface |
| 中文描述： | 模擬控制接口 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 1138K |
| 代理商： | FX839 |
Analogue Control Interface
FX839
1997 Consumer Microcircuits Limited
8
D/839/4
The microcontroller is required to wait during the conversion time, T
conv_max
(Figure 3), before issuing a 'READ
ADC DATAx' command. If this is not done, then the converted data returned on 'C-BUS' will be the result of the
previous conversion on the selected channel. It is possible for the data conversion rate to exceed the reply rate
on 'C-BUS'. In such a case, the data returned will be the result of the most recent conversion completed.
Figure 3: Example of a "conversion and read"
* T
conv_max
is directly related to the ADC clock frequency, which in turn is set by the external clock frequency
and the clock divider.
T
conv_max
= ((10 + 2) x '
NUMBER OF ENABLED MUX INPUTS'
/ f
adc_clk
)
[Seconds
]
Note that after reading the ADC1 data, it is necessary to re-enable the conversion of data by setting Bit 5 of the
ADC Control Register to ‘1’.
Magnitude Comparators and Interrupt Request
High and low digital comparator reference levels are provided for the four digital magnitude comparators via the
'C-BUS' interface. The digital input to the comparators is provided by the most significant 8 bits of each ADC
data.
When the sampled data falls outside the high or low digital comparator reference levels the status register is
updated and the IRQN pin is pulled low. When a reference level is set to '0', its IRQ is disabled.
1.5.1
Software Description
Address/Commands
Instructions and Data are transferred via the 'C-BUS' in accordance with the timing information given in
Figure 4.
Instruction and data transactions to and from the FX839 consist of an Address/Command byte followed
by either:
(i)
(ii)
a control or DAC data write (1 or 2 bytes) or,
a status or ADC data read (1 or 2 bytes)
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