參數(shù)資料
型號(hào): FX839
英文描述: Analogue Control Interface
中文描述: 模擬控制接口
文件頁數(shù): 4/22頁
文件大小: 1138K
代理商: FX839
Analogue Control Interface
FX839
1997 Consumer Microcircuits Limited
4
D/839/4
1.3
Signal List
Package
P4/D2/D5
Signal
Description
Pin No.
Name
Type
1
XTALN
O/P
The inverter output of the on-chip oscillator.
2
XTAL/CLOCK
I/P
The input to the on-chip oscillator, for external Xtal circuit
or clock.
3
SERIAL
CLOCK
I/P
The 'C-BUS' serial clock input. This clock, produced by
the μController, is used for transfer timing of commands
and data to and from the device.
See 'C-BUS' Timing Diagram (Figure 4).
4
COMMAND
DATA
I/P
The 'C-BUS' serial data input from the μController. Data is
loaded into this device in 8-bit bytes, MSB (B7) first, and
LSB (B0) last, synchronised to the SERIAL CLOCK.
See 'C-BUS' Timing Diagram (Figure 4).
5
REPLY DATA
O/P
The 'C-BUS' serial data output to the μController. The
transmission of REPLY DATA bytes is synchronised to the
SERIAL CLOCK under the control of the CSN input.
This 3-state output is held at high impedance when not
sending data to the μController. See 'C-BUS' Timing
Diagram (Figure 4).
6
CSN
I/P
The 'C-BUS' data loading control function: this input is
provided by the μController. Data transfer sequences are
initiated, completed or aborted by the CSN signal.
See 'C-BUS' Timing Diagram (Figure 4).
7
IRQN
O/P
This output indicates an interrupt condition to the
μController by going to a logic '0'. This is a 'wire-ORable'
output, enabling the connection of up to 8 peripherals to 1
interrupt port on the μController. This pin has a low
impedance pulldown to logic '0' when active and a high-
impedance when inactive. An external pullup resistor is
required.
The conditions that cause interrupts are indicated in the
IRQ FLAG register and are effective if not disabled.
8
ADCIN1
I/P
Analogue to digital converter input 1 (ADC1)
9
ADCIN2
I/P
Analogue to digital converter input 2 (ADC2)
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