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參數(shù)資料
| 型號： | FUSB1500MHX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB 2.0 TRANSCEIVER 16-MLP |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | USB 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | USB 2.0 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-MLP（3x3） |
| 包裝： | 帶卷 (TR) |
2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FUSB1500 Rev. 1.0.1
3
FUSB1500
/
FUSB1501
—
USB2.0
Full-Speed
/
Low-Speed
Transceiver
with
Charger
Detection
Pin Configuration
Figure 2. Pin Configuration (Top-Through View)
Pin Definitions
Pin #
Name
I/O
Description
1
OE_N
I
Output enable. Active LOW enables the transceiver to transmit data on the bus. When
not active, the transceiver is in the receive mode (CMOS level is relative to VIO).
2
RCV
O
Receive data output. Non-inverted CMOS level output for USB differential input (CMOS
output level is relative to VIO). Driven LOW when SUSPND mode is active; (SUSPND is
only enabled per the specific extended control table – see Table 4); RCV output is
stable and preserved during SE0 condition.
3
VP
O
Single-ended D+ receiver output VP (CMOS level relative to VIO); used for external
detection of SE0, error conditions, speed of connected device; driven HIGH when no
supply connected to VREG3V3.
4
VM
O
Single-ended D- receiver output VM (CMOS level relative to VIO); used for external
detection of SE0, error conditions, speed of connected device; driven HIGH when no
supply is connected to VREG3V3.
5
SUSPND
I
Suspend. Enables a low-power state (CMOS level is relative to VIO). While the
FUSB1500 is suspended, it drives the RCV pin to logic “0” state. (Suspend is only
enabled per the specific extended control table – see Table 4).
6
HiZ
I
High-Z input (CMOS level is relative to VIO). HIGH selects the high-Z mode, which puts
all the outputs, including VPU, in high impedance. There is a 100k
weak pull-down on
this pin.
7
VIO
Supply voltage for digital I/O pins (1.65V to 3.6V). When not connected, the D+ and D-
pins are in three-state. This supply bus is independent of VPU and VREG3V3.
8
SPEED_N
I
Speed selection input (CMOS level relative to VIO); adjusts the slew rate of differential
outputs D+ and D- according to the extended control table (see Table 4).
9
D-
AI/O
Data- bus connection.
10
D+
AI/O
Data+ bus connection; for FS peripheral mode, connect to VPU via 1.5k
.
11
VO/VPO
I
Driver data input (CMOS level is relative to VIO); Schmitt-trigger input; VO is input pin
for SE Mode.
12
FSE0/VMO
I
Driver data input (CMOS level is relative to VIO); Schmitt-trigger input; FSE0 is input pin
for SE Mode, see Table 2 and Table 3.
13
VREG3V3
Supply voltage input for 3.3V operation.
14
INT_N
O
This interrupt is active LOW. It is asserted when an SE0 is seen on the USB bus (SE0
detection circuit is only enabled per the specific extended control table). It is also
referenced to VIO.
15
VPU
Pull-up supply voltage (3.3V
300mV); connect an external 1.5k resistor on D+
(FS data rate) or D- (LS data rate). Internal switch is controlled by the CONFIG,
SPEED_N, and SUSPND input pins (see Table 4).
16
CONFIG
I
USB connect or disconnect, software-control input. SPEED_N and SUSPND also gate
the pull-up resistor (see Table 4).
Exposed
Die Pad
GND
GND GND supply bonded to exposed die pad to be connected to the PCB GND.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FUSB1501 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:USB2.0 Full-Speed / Low-Speed Transceiver with Charger Detection |
| FUSB1501MHX | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:USB2.0 Full-Speed / Low-Speed Transceiver with Charger Detection |
| FUSB155 | 制造商:DBLECTRO 制造商全稱:DB Lectro Inc 功能描述:Radial Leaded PTC FUSB Series |
| FUSB155F | 制造商:RFE 制造商全稱:RFE international 功能描述:Radial Leaded PPTC FUSB Series |
| FUSB160 | 制造商:DBLECTRO 制造商全稱:DB Lectro Inc 功能描述:Radial Leaded PTC FUSB Series |
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