FM8P51
Rev1.2 Mar 15, 2005
P.20/FM8P51
FEELING
TECHNOLOGY
T1P1:T1P0
: Timer 1 prescaler bits.
T1P1 : T1P0
Prescaler Rate
1 : 1
1 : 4
1 : 8
1 : 16
0, 0
0, 1
1, 0
1, 1
T1ON
: Timer 1 module enable bit
= 1, Enable Timer 1 module.
= 0, Disable Timer 1 module.
2.1.34 PHCON (Pull-high Control Register)
Address
Name
0Dh (r/w)
PHCON
Accessed by IOST/IOSTR instructions.
/PHA
: = 0, Enable the internal pull-high of IOA0~ IOA7 pins.
= 1, Disable the internal pull-high of IOA0~ IOA7 pins.
/PHB
: = 0, Enable the internal pull-high of IOB0~ IOB7 pins.
= 1, Disable the internal pull-high of IOB0~ IOB7 pins.
Note : /PHB is “AND” gating with /PHBCE, that is each one written “0” will enable pull-high.
/PHD
: = 0, Enable the internal pull-high of IOD0~ IOD7 pins.
= 1, Disable the internal pull-high of IOD0~ IOD7 pins.
/PHE
: = 0, Enable the internal pull-high of IOE0~ IOE5 pins.
= 1, Disable the internal pull-high of IOE0~ IOE5 pins.
Note : /PHE is “AND” gating with /PHBCE, that is each one written “0” will enable pull-high.
HDC
: Driving ability enable bit of IOC0~IOC2 pins.
= 0, Normal driving ability of IOC0~IOC2 pins.
= 1, Reduce the driving ability of IOC0~IOC2 pins.
2.1.35 PCON (Power Control Register)
Address
Name
B7
B6
0Eh (r/w)
PCON
LVDTE
ODE
Accessed by IOST/IOSTR instructions.
/WUE
: Input change wake-up function of IOB0~IOB7, IOC4~IOC5, and IOE0~IOE1 pins enable bit.
= 0, Enable the input change wake-up function.
= 1, Disable the input change wake-up function.
Bit2:Bit1
: Not used. Read as “0”s.
ROC
: R-option function of IOD0 and IOD1 pins enable bit.
= 0, Disable the R-option function.
= 1, Enable the R-option function. In this case, if a 430K
external resistor is connected/disconnected to Vss,
the status of IOD0 (IOD1) is read as “0”/”1”.
Bit4
: Not used. Read as “1”.
B7
HDC
B6
B5
B4
B3
/PHE
B2
/PHD
B1
/PHB
B0
/PHA
B5
B4
-
B3
ROC
B2
-
B1
-
B0
/WUE
WDTE