參數(shù)資料
型號(hào)： FM8P51EP
廠(chǎng)商： Electronic Theatre Controls, Inc.
英文描述： EPROM/ROM-Based 8-Bit Microcontroller
中文描述： 存儲(chǔ)器/基于ROM的8位微控制器
文件頁(yè)數(shù)： 11/60頁(yè)
文件大?。?/td> 369K
代理商： FM8P51EP
FM8P51
Rev1.2 Mar 15, 2005
P.11/FM8P51
FEELING
TECHNOLOGY
2.1.4 STATUS (Status Register)
Address
03h (r/w)
STATUS
This register contains the arithmetic status of the ALU, the RESET status.
If the STATUS Register is the destination for an instruction that affects the Z, DC or C bits, then the write to these
three bits is disabled. These bits are set or cleared according to the device logic. Furthermore, the TOand
PD
bits
are not writable. Therefore, the result of an instruction with the STATUS Register as destination may be different
than intended. For example, CLRR STATUS will clear the upper three bits and set the Z bit. This leaves the
STATUS Register as 000u u1uu (where u = unchanged).
C
: Carry/borrow bit.
ADDAR, ADDIA
= 1, a carry occurred.
= 0, a carry did not occur.
SUBAR, SUBIA
= 1, a borrow did not occur.
= 0, a borrow occurred.
Note : A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRR, RLR)
instructions, this bit is loaded with either the high or low order bit of the source register.
DC
: Half carry/half borrow bit.
ADDAR, ADDIA
= 1, a carry from the 4th low order bit of the result occurred.
= 0, a carry from the 4th low order bit of the result did not occur.
SUBAR, SUBIA
= 1, a borrow from the 4th low order bit of the result did not occur.
= 0, a borrow from the 4th low order bit of the result occurred.
Z
:
Zero bit.
= 1, the result of a logic operation is zero.
= 0, the result of a logic operation is not zero.
PD
: Power down flag bit.
= 1, after power-up or by the CLRWDT instruction.
= 0, by the SLEEP instruction.
TO
: Time overflow flag bit.
= 1, after power-up or by the CLRWDT or SLEEP instruction.
= 0, a watch-dog time overflow occurred.
PG1:PG0
: Program memory page select bits. Used for GOTO, CALL, or any instruction with PCL as destination.
PG1
PG0
Program Memory Page [Address]
0
0
Page 0 [000h~3FFh]
0
1
Page 1 [400h~7FFh]
1
0
Page 2 [800h~BFFh]
1
1
Page 3 [C00h~FFFh]
GP
: General purpose read/write bit.
Name
B7
GP
B6
PG1
B5
PG0
B4
TO
B3
PD
B2
Z
B1
DC
B0
C
相關(guān)PDF資料
PDF描述
FM8P51F EPROM/ROM-Based 8-Bit Microcontroller
FM8P51P EPROM/ROM-Based 8-Bit Microcontroller
FM8P51E EPROM/ROM-Based 8-Bit Microcontroller
FM8P54 EPROM/ROM-Based 8-Bit Microcontroller Series
FM8P54E EPROM/ROM-Based 8-Bit Microcontroller Series
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
FM8P51F 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller
FM8P51P 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller
FM8P54 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller Series
FM8P54E 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller Series
FM8P56 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:EPROM/ROM-Based 8-Bit Microcontroller Series
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