參數(shù)資料
型號(hào): FM8P51
廠商: Electronic Theatre Controls, Inc.
英文描述: EPROM/ROM-Based 8-Bit Microcontroller
中文描述: 存儲(chǔ)器/基于ROM的8位微控制器
文件頁(yè)數(shù): 50/60頁(yè)
文件大小: 369K
代理商: FM8P51
FM8P51
Rev1.2 Mar 15, 2005
P.50/FM8P51
FEELING
TECHNOLOGY
GOTO
Syntax:
Operands:
Operation:
Unconditional Branch
GOTO I
0
I
1023
I
PC<9:0>
PG<1:0>
PC<11:10>
None
GOTO is an unconditional branch. The 10-bit immediate value is loaded into PC bits <9:0>.
GOTO is a two-cycle instruction.
2
Status Affected:
Description:
Cycles:
INCR
Syntax:
Operands:
Increment R
INCR R, d
0
R
63
d
[0,1]
R + 1
dest
Z
The contents of register ‘R’ are incremented. If ‘d’ is 0 the result is placed in the ACC register.
If ‘d’ is 1 the result is placed back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
INCRSZ
Syntax:
Operands:
Increment R, Skip if 0
INCRSZ R, d
0
R
63
d
[0,1]
R + 1
dest, skip if result = 0
None
The contents of register ‘R’ are incremented. If ‘d’ is 0 the result is placed in the ACC register.
If ‘d’ is the result is placed back in register ‘R’.
If the result is 0, then the next instruction, which is already fetched, is discarded and a NOP is
executed instead making it a two-cycle instruction.
1(2)
Operation:
Status Affected:
Description:
Cycles:
INT
Syntax:
Operands:
Operation:
S/W Interrupt
INT
None
PC + 1
Top of Stack,
002h
PC
None
Interrupt subroutine call. First, return address (PC+1) is pushed onto the stack. The address
002h is loaded into PC bits <10:0>.
2
Status Affected:
Description:
Cycles:
IORAR
Syntax:
Operands:
OR ACC with R
IORAR R, d
0
R
63
d
[0,1]
ACC or R
dest
Z
Inclusive OR the ACC register with register ‘R’. If ‘d’ is 0 the result is placed in the ACC
register. If ‘d’ is 1 the result is placed back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
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