參數(shù)資料
型號(hào): FM8P51
廠商: Electronic Theatre Controls, Inc.
英文描述: EPROM/ROM-Based 8-Bit Microcontroller
中文描述: 存儲(chǔ)器/基于ROM的8位微控制器
文件頁數(shù): 44/60頁
文件大?。?/td> 369K
代理商: FM8P51
FM8P51
Rev1.2 Mar 15, 2005
P.44/FM8P51
FEELING
TECHNOLOGY
3.0 INSTRUCTION SET
Mnemonic,
Operands
BCR
BSR
BTRSC
BTRSS
NOP
Description
Operation
Cycles
Status
Affected
-
R, bit
Clear bit in R
R, bit
Set bit in R
R, bit
Test bit in R, Skip if Clear
R, bit
Test bit in R, Skip if Set
No Operation
0
R<b>
1
1
R<b>
1
-
Skip if R<b> = 0
1/2
(1)
1/2
(1)
-
Skip if R<b> = 1
-
No operation
00h
WDT,
00h
WDT prescaler
ACC
OPTION
1
-
CLRWDT
Clear Watchdog Timer
1
TO,
PD
OPTION
OPTIONR
Load OPTION register
1
-
Read OPTION register
OPTION
ACC
00h
WDT,
00h
WDT prescaler
1
-
SLEEP
Go into power-down mode
1
TO,
PD
DAA
Adjust ACC’s data format from
HEX to DEC after any addition
operation
Adjust ACC’s data format from
HEX to DEC after any subtraction
operation
ACC(hex)
ACC(dec)
1
C
DAS
ACC(hex)
ACC(dec)
1
-
TBL
Table look-up
PC<7:0> + ACC
PC<7:0>
PC<9:8> unchanged
PG<1:0>
PC<11:10>
PC + 1
Top of Stack,
002h
PC
1
GIE
1
C, DC, Z
INT
S/W interrupt
2
-
ENI
DISI
RETURN
Set GIE bit
1
-
Clear GIE bit
0
GIE
1
-
Return from subroutine
Top of Stack
PC
Top of Stack
PC,
1
GIE
00h
ACC
2
-
RETFIE
Return from interrupt, set GIE bit
2
-
CLRA
IOST
IOSTR
CLRR
MOVAR
MOVR
DECR
R
R
R
R
R, d
Move R
R, d
Decrement R
Clear ACC
1
Z
Load IOST register
ACC
IOST register
1
-
Read IOST register
IOST register
ACC
1
-
Clear R
00h
R
1
Z
Move ACC to R
ACC
R
1
-
R
dest
1
Z
R - 1
dest
R - 1
dest,
Skip if result = 0
R + 1
dest
R + 1
dest,
Skip if result = 0
R + ACC
dest
1
Z
DECRSZ R, d
Decrement R, Skip if 0
1/2
(1)
-
INCR
R, d
Increment R
1
Z
INCRSZ
R, d
Increment R, Skip if 0
1/2
(1)
-
ADDAR
SUBAR
ADCAR
SBCAR
ANDAR
R, d
Add ACC and R
R, d
Subtract ACC from R
R, d
Add ACC and R with Carry
R, d
Subtract ACC from R with Carry
R, d
AND ACC with R
1
C, DC, Z
R - ACC
dest
1
C, DC, Z
R + ACC + C
dest
1
C, DC, Z
R + ACC + C
dest
1
C, DC, Z
ACC and R
dest
1
Z
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