FM8P51
Rev1.2 Mar 15, 2005
P.18/FM8P51
FEELING
TECHNOLOGY
2.1.28 CMPDY (Data Comparator Status Register) (Bank 3)
Address
Name
B7
0Fh (r)
CMPSTAT
CMPF4:CMPF0
: the error number of the compared result (0 ~ 8) of data comparator
Bit7:bit4
: Not used. Read as “0”s.
2.1.29 INTFLAG (Interrupt Status Register)
Address
Name
B7
B6
3Fh (r/w)
INTFLAG
SPITXIF
RFCIF
T0IF
: Timer0 overflow interrupt flag. Set when Timer0 overflows, reset by software.
INTIF
: External INT pin interrupt flag. Set by falling edge on INT pin, reset by software.
SPIRCIF
: SPI receive module interrupt flag. Set when SPI receiver buffer is full (SPI data transmission complete),
reset by software.
T1IF
: Timer1 match interrupt flag. Set when TMR1 register matches to PR1 register, reset by software.
T2IF
: Timer2 match interrupt flag. Set when TMR2 register matches to PR2 register, reset by software.
T3IF
: Timer3 match interrupt flag. Set when TMR3 register matches to PR3 register, reset by software.
RFCIF
: RFC module interrupt flag. Set when RFC conversion is completed, reset by software.
SPITXIF
reset by software.
2.1.30 ACC (Accumulator)
Address
Name
B7
B6
B5
N/A (r/w)
ACC
Accumulator is an internal data transfer, or instruction operand holding. It can not be addressed.
2.1.31 OPTION Register
Address
Name
B7
B6
B5
N/A (r/w)
OPTION
/PHBCE
GIE
Accessed by OPTION/OPTIONR instructions.
By executing the OPTION instruction, the contents of the ACC Register will be transferred to the OPTION Register.
By executing the OPTIONR instruction, user can read this register into ACC.
The OPTION Register contains various control bits to configure the Timer0/WDT prescaler, Timer0, pull-high, and
interrupt.
The OPTION Register are set all “1”s except GIE bit after any reset.
B6
-
B5
-
B4
-
B3
B2
B1
B0
-
CMPF3
CMPF2
CMPF1
CMPF0
B5
T3IF
B4
T2IF
B3
T1IF
B2
B1
INTIF
B0
T0IF
SPIRCIF
B4
Accumulator
B3
B2
B1
B0
B4
B3
PSA
B2
PS2
B1
PS1
B0
PS0