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參數(shù)資料
| 型號： | FDW9926NZ |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | Common Drain N-Channel 2.5V specified PowerTrench MOSFET |
| 中文描述： | 4500 mA, 20 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | TSSOP-8 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 120K |
| 代理商： | FDW9926NZ |
FDW9926NZ Rev. D(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V,
I
D
= 250
μ
A
20
V
I
D
= 250
μ
A, Referenced to 25
°
C
15
mV/
°
C
V
DS
= 16 V,
V
GS
=
±
12 V,
V
GS
= 0 V
V
DS
= 0 V
1
μ
A
μ
A
±
10
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
I
D
= 250
μ
A
0.6
1
1.5
V
–3.1
mV/
°
C
V
GS
= 4.5 V,
V
GS
= 2.5 V,
V
GS
= 4.5 V, I
D
= 4.5A, T
J
=125
°
C
V
DS
= 5 V,
I
D
= 4.5 A
I
D
= 4.5 A
I
D
= 3.8 A
27
38
36
32
45
49
m
g
FS
Forward Transconductance
22
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
600
160
90
1.4
pF
pF
pF
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV,
f = 1.0 MHz
Switching Characteristics
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
(Note 2)
8
8
16
16
26
8
8
ns
ns
ns
ns
nC
nC
nC
14
4
5.7
1.3
1.7
V
DD
= 10 V,
V
GS
= 4.5 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 4.5 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
0.83
1.2
A
V
V
GS
= 0 V,
I
S
= 0.83 A
(Note 2)
0.7
16
5
nS
nC
I
F
= 4.5 A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) R
θ
JA
is 77
°
C/W (steady state) when mounted on a 1 inch2 copper pad on FR-4.
b) R
θ
JA
is 114
°
C/W (steady state) when mounted on a minimum copper pad on FR-4.
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
3.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
F
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