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參數(shù)資料
| 型號(hào)： | FDG6318P |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | CAP CER 1500PF 630V 10% X7R 1206 |
| 中文描述： | 500 mA, 20 V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | SC-70, 6 PIN |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大?。?/td> | 123K |
| 代理商： | FDG6318P |
FDG6318P Rev C (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
GS
= 0 V,
I
D
= –250
μ
A
–20
V
BV
DSS
T
J
I
DSS
I
GSS
I
D
= –250
μ
A, Referenced to 25
°
C
–10
mV/
°
C
V
DS
= –16 V, V
GS
= 0 V
V
GS
=
±
12 V, V
DS
= 0 V
–1
±
100
μ
A
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= –250
μ
A, Referenced to 25
°
C
V
GS
= –4.5 V, I
D
= –0.5 A
V
GS
= –2.5 V, I
D
= –0.4 A
V
GS
= –4.5 V, I
D
= –0.5 A, T
J
=125°C
V
GS
= –4.5 V, V
DS
= –5 V
V
DS
= –5 V, I
D
= –0.5 A
I
D
= –250
μ
A
–0.65
–1.2
2
–1.5
V
mV/
°
C
580
980
780
1.1
780
1200
m
A
S
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
–1.8
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
R
G
Gate Resistance
83
20
11
12.1
pF
pF
pF
V
DS
= –10 V, V
GS
= 0 V,
f = 1.0 MHz
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
6
12
6
1
0.86
0.22
0.25
12
22
13
3
1.2
ns
ns
ns
ns
nC
nC
nC
V
DD
= –10 V, I
D
= 1 A,
V
GS
= –4.5 V, R
GEN
= 6
V
DS
= –10 V, I
D
= –0.6 A,
V
GS
= –4.5 V
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
–0.25
–1.2
A
V
V
GS
= 0 V,
I
S
= –0.25 A
(Note 2)
–0.83
12.6
2.52
ns
nC
I
F
= –0.5 A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user's board design. R
θ
JA
= 415°C/W when mounted on a minimum pad .
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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