參數(shù)資料
型號: FDG6318P
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號晶體管
英文描述: CAP CER 1500PF 630V 10% X7R 1206
中文描述: 500 mA, 20 V, 2 CHANNEL, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SC-70, 6 PIN
文件頁數(shù): 1/5頁
文件大?。?/td> 123K
代理商: FDG6318P
January 2003
2003 Fairchild Semiconductor Corporation
FDG6318P Rev C (W)
FDG6318P
Dual P-Channel, Digital FET
General Description
These dual P-Channel logic level enhancement mode
MOSFET are produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for bipolar digital
transistors and small signal MOSFETS.
Applications
Battery management
Features
–0.5 A, –20 V.
R
DS(ON)
= 780 m
@ V
GS
= –4.5 V
R
DS(ON)
= 1200 m
@ V
GS
= –2.5 V
Very low level gate drive requirements allowing direct
operation in 3V circuits (V
GS(th)
< 1.5V).
Compact industry standard SC70-6 surface mount
package
S
G
D
D
G
S
Pin 1
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
S
G
D
D
G
S
6 or 3
5 or 2
4 or 1
1 or 4
2 or 5
3 or 6
Absolute Maximum Ratings
T
A
=25
o
C unless otherwise noted
Symbol
Parameter
V
DSS
Drain-Source Voltage
V
GSS
Gate-Source Voltage
I
D
Drain Current – Continuous
– Pulsed
P
D
Power Dissipation for Single Operation
T
J
, T
STG
Operating and Storage Junction Temperature Range
Ratings
–20
±12
–0.5
–1.8
0.3
–55 to +150
Units
V
V
A
W
°
C
(Note 1)
(Note 1)
Thermal Characteristics
R
θ
JA
Thermal Resistance, Junction-to-Ambient
(Note 1)
415
°
C/W
Package Marking and Ordering Information
Device Marking
Device
.38
FDG6318P
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
F
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