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參數(shù)資料
| 型號： | FDD8750 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | N-Channel PowerTrench MOSFET 25V, 2.7A, 40mohm |
| 中文描述： | 6.5 A, 25 V, 63 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252 |
| 封裝： | DPAK-3 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 328K |
| 代理商： | FDD8750 |
F
M
FDD8750 Rev.C
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
I
D
= 250
μ
A, V
GS
= 0V
25
V
I
D
= 250
μ
A, referenced to 25°C
18
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
V
DS
=20V, V
GS
= 0V
1
μ
A
T
J
=150°C
250
±100
I
GSS
Gate to Source Leakage Current
V
GS
= ±20V, V
GS
= 0V
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= 250
μ
A
1.2
2.0
2.5
V
I
D
= 250
μ
A, referenced to 25°C
-5
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 10V, I
D
= 2.7A
V
GS
= 4.5V, I
D
= 2.7A
V
GS
= 10V, I
D
= 2.7A, T
J
=150°C
28
39
44
40
60
63
m
(Note 2)
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS
= 13V, V
GS
= 0V,
f = 1MHz
320
80
50
1.8
425
110
75
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
g(5)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
DD
= 13V, I
D
= 2.7A
V
GS
= 10V, R
GEN
= 6
3
10
22
16
10
9
5
ns
ns
ns
ns
nC
nC
nC
nC
12
8
5
6
3.4
1.1
1.2
V
GS
= 0V to 10V
V
GS
= 0V to 5V
V
DD
=13V
I
D
= 2.7A
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0V, I
S
= 2.7A (Note 2)
0.8
16
7
1.6
24
11
V
ns
nC
I
F
= 2.7A, di/dt = 100A/
μ
s
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user’s board design.
2
pad of 2 oz copper;
a. 40°C/W when mounted on a 1 in
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3:
Starting T
J
= 25°C, L = 3mH, I
AS
= 3.6A, V
DD
= 25V, V
GS
= 10V.
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