參數(shù)資料
型號: FDD8424H
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Dual N & P-Channel PowerTrench㈢ MOSFET
中文描述: 20 A, 40 V, 0.024 ohm, 2 CHANNEL, N AND P-CHANNEL, Si, POWER, MOSFET
封裝: ROHS COMPLIANT, TO-252, DPAK-4
文件頁數(shù): 2/12頁
文件大?。?/td> 591K
代理商: FDD8424H
F
www.fairchildsemi.com
2
2007 Fairchild Semiconductor Corporation
FDD8424H Rev.C
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown Voltage
I
D
= 250
μ
A, V
GS
= 0V
I
D
= -250
μ
A, V
GS
= 0V
I
D
= 250
μ
A, referenced to 25°C
I
D
= -250
μ
A, referenced to 25°C
V
DS
= 32V, V
GS
= 0V
V
DS
= -32V, V
GS
= 0V
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
40
-40
V
BV
DSS
T
J
Breakdown Voltage Temperature
Coefficient
34
-32
mV/°C
I
DSS
Zero Gate Voltage Drain Current
1
-1
μ
A
I
GSS
Gate to Source Leakage Current
V
GS
= ±20V, V
DS
= 0V
±100
±100
nA
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
V
GS
= V
DS
, I
D
= -250
μ
A
I
D
= 250
μ
A, referenced to 25°C
I
D
= -250
μ
A, referenced to 25°C
V
GS
= 10V, I
D
= 9.0A
V
GS
= 4.5V, I
D
= 7.0A
V
GS
= 10V, I
D
= 9.0A, T
J
= 125°C
V
GS
= -10V, I
D
= -6.5A
V
GS
= -4.5V, I
D
= -5.6A
V
GS
= -10V, I
D
= -6.5A, T
J
= 125°C
V
DS
= 5V, I
D
= 9.0A
V
DS
= -5V, I
D
= -6.5A
Q1
Q2
Q1
Q2
1
-1
1.7
-1.6
-5.3
4.8
19
23
29
42
58
62
29
13
3
-3
V
V
GS(th)
T
J
Gate to Source Threshold Voltage
Temperature Coefficient
mV/°C
r
DS(on)
Static Drain to Source On Resistance
Q1
24
30
37
54
70
80
m
Q2
g
FS
Forward Transconductance
Q1
Q2
S
Dynamic Characteristics
C
iss
Input Capacitance
Q1
V
DS
= 20V, V
GS
= 0V, f = 1MHZ
Q2
V
DS
= -20V, V
GS
= 0V, f = 1MHZ
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
750
1000
115
140
75
75
1.1
3.3
1000
1330
155
185
115
115
pF
C
oss
Output Capacitance
pF
C
rss
Reverse Transfer Capacitance
pF
R
g
Gate Resistance
f = 1MHz
Switching Characteristics
t
d(on)
Turn-On Delay Time
Q1
V
DD
= 20V, I
D
= 9.0A,
V
GS
= 10V, R
GEN
= 6
Q2
V
DD
= -20V, I
D
= -6.5A,
V
GS
= -10V, R
GEN
= 6
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
7
7
14
14
24
10
31
36
12
10
20
24
ns
t
r
Rise Time
13
3
17
20
6
3
14
17
2.3
3.0
3.2
3.6
ns
t
d(off)
Turn-Off Delay Time
ns
t
f
Fall Time
ns
Q
g(TOT)
Total Gate Charge
Q1
V
GS
= 10V, V
DD
= 20V, I
D
= 9.0A
Q2
V
GS
= -10V, V
DD
= -20V, I
D
= -6.5A
nC
Q
gs
Gate to Source Charge
nC
Q
gd
Gate to Drain “Miller” Charge
nC
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