參數(shù)資料
型號(hào): FDC3512
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號(hào)晶體管
英文描述: 80V N-Channel PowerTrench MOSFET
中文描述: 3000 mA, 80 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SUPERSOT-6
文件頁數(shù): 2/5頁
文件大小: 133K
代理商: FDC3512
FDC3512 Rev B2(W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ Max Units
Drain-Source Avalanche Ratings
(Note 2)
W
DSS
Drain-Source Avalanche Energy
I
AR
Drain-Source Avalanche Current
Single Pulse, V
DD
= 40 V, I
D
=3.0 A
90
3.0
mJ
A
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSSF
I
GSSR
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
V
GS
= 0 V, I
D
= 250
μ
A
80
V
I
D
= 250
μ
A, Referenced to 25
°
C
80
mV/
°
C
V
DS
= 64 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= –20 V, V
DS
= 0 V
1
μ
A
nA
nA
100
–100
On Characteristics
V
GS(th)
V
GS(th)
T
J
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
V
DS
= V
GS
, I
D
= 250
μ
A
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V, I
D
= 3.0 A
V
GS
= 6.0 V, I
D
= 2.8 A
V
GS
= 10 V, I
D
= 3.0 A;T
J
= 125
°
C
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10 V, I
D
= 3.0 A
2
2.4
4
V
–6
mV/
°
C
R
DS(on)
Static Drain–Source
On Resistance
56
61
97
14
77
88
141
m
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
10
A
S
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
634
58
28
pF
pF
pF
V
DS
= 40 V,
f = 1.0 MHz
V
GS
= 0 V,
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
7
3
24
4
13
2.4
2.8
14
6
28
8
18
ns
ns
ns
ns
nC
nC
nC
V
DD
= 40 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DS
= 40 V,
V
GS
= 10 V
I
D
= 3.0 A,
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
1.3
A
V
SD
V
GS
= 0 V,
I
S
= 1.3 A
(Note 2)
0.8
1.2
V
28.2
48
nS
nC
I
F
= 3.0 A,
d
iF
/d
t
= 300 A/μs
(Note 2)
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a. 78°C/W when mounted on a 1in
2
pad of 2oz copper on FR-4 board.
b. 156°C/W when mounted on a minimum pad.
2.
Pulse Test: Pulse Width
300
μ
s, Duty Cycle
2.0%
F
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