參數(shù)資料
型號(hào)： EVAL-ADV739XFEZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 71/108頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADV739XFEZ
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®
主要目的： 視頻，視頻處理
嵌入式： 否
已用 IC / 零件： ADV7403
主要屬性： NTSC/PAL 數(shù)字視頻解碼器
次要屬性： 前端板，用于 ADV7390、ADV7391、ADV7392 和 ADV7393 編碼器背端板
已供物品： 板
Data Sheet
ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 65 of 108
EXTERNAL HORIZONTAL AND VERTICAL SYNCHRONIZATION CONTROL
For timing synchronization purposes, the ADV739x is able to accept either EAV/SAV time codes embedded in the input pixel data or
external synchronization signals provided on the HSYNC and VSYNC pins (see Table 53). It is also possible to output synchronization
signals on the HSYNC and VSYNC pins (see Table 54 to Table 56).
Table 53. Timing Synchronization Signal Input Options
Signal
Pin
Condition
SD HSYNC In
HSYNC
SD slave timing (Mode 1, Mode 2, or Mode 3) selected (Subaddress 0x8A[2:0])1
SD VSYNC/FIELD In
VSYNC
SD slave timing (Mode 1, Mode 2, or Mode 3) selected (Subaddress 0x8A[2:0])1
ED/HD HSYNC In
HSYNC
ED/HD timing synchronization inputs enabled (Subaddress 0x30, Bit 2 = 0)
ED/HD VSYNC/FIELD In
VSYNC
ED/HD timing synchronization inputs enabled (Subaddress 0x30, Bit 2 = 0)
1 SD and ED/HD timing synchronization outputs must also be disabled (Subaddress 0x02[7:6] = 00).
Table 54. Timing Synchronization Signal Output Options
Signal
Pin
Condition
SD HSYNC Out
HSYNC
SD timing synchronization outputs enabled (Subaddress 0x02, Bit 6 = 1)1
SD VSYNC/FIELD Out
VSYNC
SD timing synchronization outputs enabled (Subaddress 0x02, Bit 6 = 1)1
ED/HD HSYNC Out
HSYNC
ED/HD timing synchronization outputs enabled (Subaddress 0x02, Bit 7 = 1)2
ED/HD VSYNC/FIELD Out
VSYNC
ED/HD timing synchronization outputs enabled (Subaddress 0x02, Bit 7 = 1)2
1 ED/HD timing synchronization outputs must also be disabled (Subaddress 0x02, Bit 7 = 0).
2 ED/HD timing synchronization inputs must also be disabled; that is, embedded EAV/SAV timing codes must be enabled (Subaddress 0x30, Bit 2 = 1).
Table 55. HSYNC Output Control1, 2
ED/HD Input Sync Format
(Subaddress 0x30,
Bit 2)
ED/HD HSYNC Control
(Subaddress 0x34,
Bit 1)
ED/HD Sync
Output Enable
(Subaddress 0x02,
Bit 7)
SD Sync
Output Enable
(Subaddress 0x02,
Bit 6)
Signal on HSYNC Pin
Duration
X
0
Tristate
N/A
X
0
1
Pipelined SD HSYNC
section.
0
1
X
Pipelined ED/HD HSYNC
As per HSYNC
timing.
1
0
1
X
Pipelined ED/HD HSYNC
based on AV Code H bit
Same as line
blanking interval.
X
1
X
Pipelined ED/HD HSYNC
based on horizontal
counter
Same as embedded
HSYNC.
1 In all ED/HD standards where there is an HSYNC output, the start of the HSYNC pulse is aligned with the falling edge of the embedded HSYNC in the output video.
2 X = don’t care.
Table 56. VSYNC Output Control1, 2
ED/HD Input
Sync Format
(Subaddress
0x30, Bit 2)
ED/HD VSYNC
Control
(Subaddress
0x34, Bit 2)
ED/HD Sync
Output Enable
(Subaddress
0x02, Bit 7)
SD Sync
Output Enable
(Subaddress
0x02, Bit 6)
Video Standard
Signal on VSYNC Pin
Duration
x
0
x
Tristate
N/A
x
0
1
Interlaced
Pipelined SD VSYNC/field
section.
0
1
x
Pipelined ED/HD VSYNC
or field signal
As per VSYNC or
field signal timing.
1
0
1
x
All HD interlaced
standards
Pipelined field signal
based on AV Code F bit
Field.
1
0
1
x
All ED/HD
progressive
standards
Pipelined VSYNC based
on AV Code V bit
Vertical blanking
interval.
相關(guān)PDF資料
PDF描述
IMC0402ER1N8S INDUCTOR 1.8NH 0402
RBM18DCSI CONN EDGECARD 36POS DIP .156 SLD
VI-2TH-EX CONVERTER MOD DC/DC 52V 75W
A3CCH-2018M IDC CABLE - AKC20H/AE20M/AKC20H
IMC0402ER1N5S INDUCTOR 1.5NH 0402
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADV7400AEBM 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer
EVAL-ADV7400EBM 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7400EBM-U2 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7401EB 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7401EBM 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*