參數(shù)資料
型號: EVAL-ADV7180LQEBZ
廠商: Analog Devices Inc
文件頁數(shù): 66/116頁
文件大小: 0K
描述: BOARD EVALUATION ADV7180
標準包裝: 1
系列: Advantiv®
主要目的: 視頻,SDTV 視頻解碼器 - NTSC,PAL,SECAM
嵌入式:
已用 IC / 零件: ADV7180
主要屬性: CVBS(復合),Y/C(S 視頻)和 YPrPb(元件)輸入
次要屬性: 8 位 ITU-R BT.656 YCrCb 4:2:2 輸出
已供物品:
相關產(chǎn)品: ADV7180BCPZ-REEL-ND - IC VIDEO DECODER SDTV 40-LFCSP
ADV7180BSTZ-ND - IC VIDEO DECODER SDTV 64-LQFP
ADV7180BCPZ-ND - IC VIDEO DECODER SDTV 40-LFCSP
Data Sheet
ADV7180
Rev. I | Page 53 of 116
ADVANCE END OF
VSYNC BY PVEND[4:0]
DELAY END OF VSYNC
BY PVEND[4:0]
VSYNC END
PVENDSIGN
ODD FIELD?
0
1
NO
YES
PVENDDELO
VSEHO
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
PVENDDELE
VSEHE
ADDITIONAL
DELAY BY
1LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
05
70
0-
0
37
Figure 46. PAL VSYNC End
PVENDDELO, PAL VSYNC End Delay on Odd Field,
Address 0xE9[7]
When PVENDDELO is 0 (default), there is no delay.
Setting PVENDDELO to 1 delays VSYNC going low on an odd
field by a line relative to PVEND.
PVENDDELE, PAL VSYNC End Delay on Even Field,
Address 0xE9[6]
When PVENDDELE is 0 (default), there is no delay.
Setting PVENDDELE to 1 delays VSYNC going low on an even
field by a line relative to PVEND.
PVENDSIGN, PAL VSYNC End Sign, Address 0xE9[5]
Setting PVENDSIGN to 0 (default) delays the end of VSYNC
(set for user manual programming).
Setting PVENDSIGN to 1 advances the end of VSYNC (not
recommended for user programming).
PVEND[4:0], PAL VSYNC End, Address 0xE9[4:0]
The default value of PVEND is 10100, indicating the PAL
VSYNC end position.
For all NTSC/PAL VSYNC timing controls, both the V bit in
the AV code and the VSYNC signal on the VS pin are modified.
PFTOGDELO, PAL Field Toggle Delay on Odd Field,
Address 0xEA[7]
When PFTOGDELO is 0 (default), there is no delay.
Setting PFTOGDELO to 1 delays the F toggle/transition on an
odd field by a line relative to PFTOG.
PFTOGDELE, PAL Field Toggle Delay on Even Field,
Address 0xEA[6]
When PFTOGDELE is 0, there is no delay.
Setting PFTOGDELE to 1 (default) delays the F toggle/transition
on an even field by a line relative to PFTOG.
PFTOGSIGN, PAL Field Toggle Sign, Address 0xEA[5]
Setting PFTOGSIGN to 0 delays the field transition. Set for user
manual programming.
Setting PFTOGSIGN to 1 (default) advances the field transition
(not recommended for user programming).
PFTOG, PAL Field Toggle, Address 0xEA[4:0]
The default value of PFTOG is 00011, indicating the PAL field
toggle position.
For all NTSC/PAL field timing controls, the F bit in the AV
code and the field signal on the FIELD pin are modified.
ADVANCE TOGGLE OF
FIELD BY PFTOG[4:0]
DELAY TOGGLE OF
FIELD BY PFTOG[4:0]
PFTOGSIGN
ODD FIELD?
0
1
NO
YES
PFTOGDELE
ADDITIONAL
DELAY BY
1LINE
1
0
PFTOGDELO
ADDITIONAL
DELAY BY
1LINE
1
0
FIELD
TOGGLE
NOT VALID FOR USER
PROGRAMMING
05
70
0-
0
38
Figure 47. PAL F Toggle
相關PDF資料
PDF描述
REC5-2415DRWZ/H4/A CONV DC/DC 5W 9-36VIN +/-15VOUT
VI-J4R-EZ-S CONVERTER MOD DC/DC 7.5V 25W
VE-B1P-EW CONVERTER MOD DC/DC 13.8V 100W
GBC20DRTF CONN EDGECARD 40POS DIP .100 SLD
DK-2612-02 CABLE FIBER OPTIC DUAL ST-SC 2M
相關代理商/技術參數(shù)
參數(shù)描述
EVAL-ADV7181CLFEBZ 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Boxed Product (Development Kits)
EVAL-ADV7181CLQEBZ 功能描述:BOARD EVAL FOR ADV7181CLQ RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口,收發(fā)器,PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板
EVAL-ADV7181DEBZ 功能描述:EVAL BOARD FOR ADV7181D RoHS:是 類別:編程器,開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PSoC® 主要目的:電源管理,熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板,CD,電源
EVAL-ADV7181EBM 制造商:Analog Devices 功能描述:UNRELEASED EVAL BOARD I.C. - Bulk
EVAL-ADV7182EBZ 功能描述:視頻 IC 開發(fā)工具 EVALUATION BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評估:LMH1251 工作電源電壓:5 V