參數(shù)資料
型號： EVAL-ADV7180LQEBZ
廠商： Analog Devices Inc
文件頁數(shù)： 30/116頁
文件大?。?/td> 0K
描述： BOARD EVALUATION ADV7180
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®
主要目的： 視頻，SDTV 視頻解碼器 - NTSC，PAL，SECAM
嵌入式： 否
已用 IC / 零件： ADV7180
主要屬性： CVBS（復(fù)合），Y/C（S 視頻）和 YPrPb（元件）輸入
次要屬性： 8 位 ITU-R BT.656 YCrCb 4:2:2 輸出
已供物品： 板
相關(guān)產(chǎn)品： ADV7180BCPZ-REEL-ND - IC VIDEO DECODER SDTV 40-LFCSP
ADV7180BSTZ-ND - IC VIDEO DECODER SDTV 64-LQFP
ADV7180BCPZ-ND - IC VIDEO DECODER SDTV 40-LFCSP
ADV7180
Data Sheet
Rev. I | Page 20 of 116
INPUT CONFIGURATION
The following are the two key steps for configuring the
ADV7180 to correctly decode the input video:
1.
Use INSEL[3:0] to configure the routing and format decoding
(CVBS, Y/C, or YPrPb). For the 64-lead and 48-lead LQFP,
see Table 13. For the 40-lead and 32-lead LFCSP, see Table 14.
2.
If the input requirements are not met using the INSEL[3:0]
options, the analog input muxing section must be configured
manually to correctly route the video from the analog
input pins to the ADC. The standard definition processor
block, which decodes the digital data, must be configured
to process the CVBS, Y/C, or YPrPb format. This is performed
by INSEL[3:0] selection.
CONNECT ANALOG VIDEO
SIGNALS TO ADV7180.
SET INSEL[3:0] TO CONFIGURE
VIDEO FORMAT. USE PREDEFINED
FORMAT/ROUTING.
CONFIGURE ADC INPUTS USING
MANUAL MUXING CONTROL BITS:
MUX_0[2:0], MUX_1[2:0], MUX_2[2:0].
SEE TABLE 15.
REFER TO
TABLE 13
REFER TO
TABLE 14
LQFP-64
LQFP-48
LFCSP-40
LFCSP-32
05
70
0-
0
11
NO
YES
Figure 16. Signal Routing Options
INSEL[3:0], Input Selection, Address 0x00[3:0]
The INSEL bits allow the user to select the input format. They
also configure the standard definition processor core to process
composite (CVBS), S-Video (Y/C), or component (YPrPb) format.
INSEL[3:0] has predefined analog input routing schemes that
do not require manual mux programming (see Table 13 and
Table 14). This allows the user to route the various video signal
types to the decoder and select them using INSEL[3:0] only.
The added benefit is that if, for example, the CVBS input is
selected, the remaining channels are powered down.
Table 13. 64-Lead and 48-Lead LQFP INSEL[3:0]
INSEL[3:0]
Video Format
Analog Input
0000
Composite
CVBS input on AIN1
0001
Composite
CVBS input on AIN2
0010
Composite
CVBS input on AIN3
0011
Composite
CVBS input on AIN4
0100
Composite
CVBS input on AIN5
0101
Composite
CVBS input on AIN6
0110
Y/C (S-Video)
Y input on AIN1
C input on AIN4
0111
Y/C (S-Video)
Y input on AIN2
C input on AIN5
1000
Y/C (S-Video)
Y input on AIN3
C input on AIN6
1001
YPrPb
Y input on AIN1
Pb input on AIN4
Pr input on AIN5
1010
YPrPb
Y input on AIN2
Pr input on AIN6
Pb input on AIN3
1011 to 1111
Reserved
Table 14. 40-Lead and 32-Lead LFCSP INSEL[3:0]
INSEL[3:0]
Video Format
Analog Input
0000
Composite
CVBS input on AIN1
0001 to 0010
Reserved
0011
Composite
CVBS input on AIN2
0100
Composite
CVBS input on AIN3
0101
Reserved
0110
Y/C (S-Video)
Y input on AIN1
C input on AIN2
0111 to 1000
Reserved
1001
YPrPb
Y input on AIN1
Pr input on AIN3
Pb input on AIN2
1010 to 1111
Reserved
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