參數(shù)資料
型號(hào): EVAL-ADAU1781Z
廠商: Analog Devices Inc
文件頁數(shù): 84/92頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADAU1781
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
主要目的: 音頻編解碼器
嵌入式: 是,DSP
已用 IC / 零件: ADAU1781
主要屬性: 立體聲,24 位,8 ~ 96 kHz 采樣率,GUI 工具
次要屬性: *
已供物品: *
ADAU1781
Rev. B| Page 85 of 92
Register 16617 and Register 16618 (0x40E9 and 0x40EA),
Nonmodulo
These registers set the boundary for the nonmodulo RAM space
used by the SigmaDSP core. An appropriate value is
automatically loaded to this register during initialization. It
should not be modified for any reason.
Register 16619 (0x40EB), SigmaDSP Core Frame Rate
Bits[3:0], SigmaDSP Core Frame Rate
These bits set the frequency of the frame start pulse, which is
delivered to the SigmaDSP core to begin processing on each audio
frame. It effectively determines the sample rate of audio in the
SigmaDSP core. This register should always be set to none at least
one frame prior to disabling Register 16630 (0x40F6), SigmaDSP
core run, Bit 0, SigmaDSP core run, to allow the SigmaDSP core
to finish processing the current frame before halting.
Table 76. Nonmodulo Registers
Bits
Description
[31:0]
Reserved
Table 77. SigmaDSP Core Frame Rate Register
Bits
Description
Default
[7:4]
Reserved
[3:0]
SigmaDSP core frame rate
0000
0000: f
S × 2 (96 kHz)
0001: f
S (48 kHz)
0010: f
S/1.5 (32 kHz)
0011: f
S/2 (24 kHz)
0100: f
S/3 (16 kHz)
0101: f
S/4 (12 kHz)
0110: f
S/6 (8 kHz)
0111: serial data input rate
1000: serial data output rate
1001: f
S × 4 (192 kHz)
1010: none
1111: none
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