參數(shù)資料
型號: EVAL-ADAU1781Z
廠商: Analog Devices Inc
文件頁數(shù): 37/92頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADAU1781
標準包裝: 1
系列: SigmaDSP®
主要目的: 音頻編解碼器
嵌入式: 是,DSP
已用 IC / 零件: ADAU1781
主要屬性: 立體聲,24 位,8 ~ 96 kHz 采樣率,GUI 工具
次要屬性: *
已供物品: *
ADAU1781
Rev. B | Page 42 of 92
NUMERIC FORMATS
DSP systems commonly use a standard numeric format.
Fractional number systems are specified by an A.B format,
where A is the number of bits to the left of the decimal point
and B is the number of bits to the right of the decimal point.
The ADAU1781 uses Numerical Format 5.23 for both the
parameter and data values.
Numerical Format 5.23
Linear range: 16.0 to (+16.0 1 LSB)
Examples:
1000 0000 0000 0000 0000 0000 0000 = 16.0
1110 0000 0000 0000 0000 0000 0000 = 4.0
1111 1000 0000 0000 0000 0000 0000 = 1.0
1111 1110 0000 0000 0000 0000 0000 = 0.25
1111 1111 0011 0011 0011 0011 0011 = 0.1
1111 1111 1111 1111 1111 1111 1111 = (1 LSB below 0)
0000 0000 0000 0000 0000 0000 0000 = 0
0000 0000 1100 1100 1100 1100 1101 = +0.1
0000 0010 0000 0000 0000 0000 0000 = +0.25
0000 1000 0000 0000 0000 0000 0000 = +1.0
0010 0000 0000 0000 0000 0000 0000 = +4.0
0111 1111 1111 1111 1111 1111 1111 = (+16.0 1 LSB)
The serial port accepts up to 24 bits on the input and is sign-
extended to the full 28 bits of the DSP core. This allows internal
gains of up to 24 dB without internal clipping.
A digital clipper circuit is used between the output of the DSP
core and the DACs or serial port outputs (see Figure 52). This
circuit clips the top four bits of the signal to produce a 24-bit
output with a range of 1.0 (minus 1 LSB) to 1.0. Figure 52
shows the maximum signal levels at each point in the data flow
in both binary and decibel values.
4-BIT SIGN EXTENSION
DATA IN
1.23
(0dB)
1.23
(0dB)
1.23
(0dB)
5.23
(24dB)
5.23
(24dB)
SERIAL
PORT
SIGNAL
PROCESSING
(5.23 FORMAT)
DIGITAL
CLIPPER
08314-
201
Figure 52. Numeric Precision and Clipping Structure
PROGRAMMING
On power-up, the ADAU1781 must be set with a clocking
scheme and then loaded with register settings. After the codec
signal path is set up, the DSP core can be programmed. There
are 1024 instruction cycles per audio sample, resulting in an
internal clock rate of 49.152 MHz when fS = 48 kHz. The
program RAM contains addresses for 512 instructions, but up
to 1024 instructions can be performed by using branching and
looping functions.
The part can be programmed easily using SigmaStudio (see
Figure 53), a graphical tool provided by Analog Devices. No
knowledge of writing line-level DSP code is required. More
information about SigmaStudio can be found at www.analog.com.
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