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參數(shù)資料
| 型號： | EVAL-AD7329CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/41頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD7329CBZ |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | iCMOS® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | 串行 |
| 輸入范圍： | ±10 V |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 30mW @ 1MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7329 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7329BRUZ-REEL7-ND - IC ADC 12BIT+SAR 8CHAN 24-TSSOP AD7329BRUZ-REEL-ND - IC ADC 12BIT+SAR 8CHAN 24-TSSOP AD7329BRUZ-ND - IC ADC 12BIT 8CH MUX SPI 24TSSOP |
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Data Sheet
AD7329
Rev. B | Page 27 of 40
Table 13. Power Mode Selection
PM1
PM0
Description
1
Full shutdown mode. In this mode, all internal circuitry on the AD7329 is powered down. Information in the control register
is retained when the AD7329 is in full shutdown mode.
1
0
Autoshutdown mode. The AD7329 enters autoshutdown on the 15th SCLK rising edge when the control register is updated.
All internal circuitry is powered down in autoshutdown.
0
1
Autostandby mode. In this mode, all internal circuitry is powered down, excluding the internal reference. The AD7329
enters autostandby mode on the 15th SCLK rising edge after the control register is updated.
0
Normal mode. All internal circuitry is powered up at all times.
Table 14. Sequencer Selection
SEQ1
SEQ2
Description
0
The channel sequencer is not used. The analog channel, selected by programming the ADD2 to ADD0 bits in the control
register, selects the next channel for conversion.
0
1
Uses the sequence of channels that were previously programmed in the sequence register for conversion. The AD7329
starts converting on the lowest channel in the sequence. The channels are converted in ascending order. If uninterrupted,
the AD7329 keeps converting the sequence. The range for each channel defaults to the range previously written into the
corresponding range register.
1
0
This configuration is used in conjunction with the channel address bits in the control register. This allows continuous
conversions on a consecutive sequence of channels, from Channel 0 through a final channel selected by the channel
address bits in the control register. The range for each channel defaults to the range previously written into the
corresponding range register.
1
The channel sequencer is not used. The analog channel, selected by programming the ADD2 bit to ADD0 bit in the control
register, selects the next channel for conversion.
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