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參數(shù)資料
| 型號： | EVAL-AD7291SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD7291 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 8 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 22.22k |
| 數(shù)據(jù)接口： | I²C |
| 已用 IC / 零件： | AD7291 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | AD7291BCPZ-RL7-ND - IC ADC I2C/SRL 22.22K 20LFCSP AD7291BCPZ-ND - IC ADC 12BIT SAR 8CH 20-LFCSP |
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AD7291
Data Sheet
Rev. B | Page 22 of 28
WRITING TO THE AD7291
WRITING TWO BYTES OF DATA TO A 16-BIT
REGISTER
All registers on the AD7921 are 16-bit registers; therefore, two
bytes of data are required to write a value to any one of these
registers. Writing two bytes of data to a register consists of the
following sequence (see Figure 25):
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
4.
The master sends a register address. The slave asserts an
acknowledge on SDA.
5.
The master sends the first data byte (most significant).
6.
The slave asserts an acknowledge on SDA.
7.
The master sends the second data byte (least significant).
8.
The slave asserts an acknowledge on SDA.
9.
The master asserts a stop condition on SDA to end the
transaction.
WRITING TO MULTIPLE REGISTERS
Writing to multiple address registers consists of the following
steps (see Figure 26):
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by
the write bit (low).
3.
The addressed slave device (AD7291) asserts an
acknowledge on SDA.
4.
The master sends a register address, for example, the CH1
DATAHIGH register address.
5.
The slave (AD7291) asserts an acknowledge on SDA.
6.
The master sends the first data byte.
7.
The slave (AD7291) asserts an acknowledge on SDA.
8.
The master sends the second data byte.
9.
The slave (AD7291) asserts an acknowledge on SDA.
10. The master sends a second register address, for example,
the command register.
11. The slave (AD7291) asserts an acknowledge on SDA.
12. The master sends the first data byte.
13. The slave (AD7291) asserts an acknowledge on SDA.
14. The master sends the second data byte.
15. The slave (AD7291) asserts an acknowledge on SDA.
16. The master asserts a stop condition on SDA to end the
transaction.
The previous example details writing to two registers only (the
CH1 DATAHIGH register address and the command register).
However, the AD7291 can read from multiple registers in one
write operation as shown in Figure 26.
0
87
11
-0
59
S
SLAVE ADDRESS
0
SA
REG POINTER
SA
DATA[15:8]
SA
P
DATA[7:0]
SA
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
SA = SLAVE ACKNOWLEDGE
A = NOT ACKNOWLEDGE
Figure 25. Writing Two Bytes of Data to a 16-Bit Register
08
71
1-
0
19
S
...
0
SA
SLAVE ADDRESS
POINT TO CH1 DATAHIGH REG (0x04)
P
SA
DATA[7:0]
DATA[15:8]
POINT TO COMMAND REG (0x00)
DATA[15:8]
SA
DATA[7:0]
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
SA = SLAVE ACKNOWLEDGE
A = NOT ACKNOWLEDGE
Figure 26. Writing to Multiple Registers
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