參數(shù)資料
型號(hào): EVAL-AD5934EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/32頁(yè)
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD5934
標(biāo)準(zhǔn)包裝: 1
主要目的: 計(jì)時(shí),直接數(shù)字合成(DDS)
嵌入式:
已用 IC / 零件: AD5934
主要屬性: 12 位數(shù)模轉(zhuǎn)換器,24 位調(diào)節(jié)字寬
次要屬性: 16MHz 2.7 V ~ 5.5 V 圖形用戶界面
已供物品: 板,線纜,軟件
產(chǎn)品目錄頁(yè)面: 797 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: AD5934YRSZ-ND - IC NTWK ANALYZER 12B 1MSP 16SSOP
AD5934YRSZ-REEL7-ND - IC CONV 12BIT 250KSPS 16SSOP
AD5934
Data Sheet
Rev. C | Page 30 of 32
LAYOUT AND CONFIGURATION
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, carefully consider
the power supply and ground return layout on the board. The
printed circuit board (PCB) containing the AD5934 should
have separate analog and digital sections, each having its own
area of the board. If the AD5934 is in a system where other
devices require an AGND-to-DGND connection, the connection
should be made at one point only. This ground point should be
as close as possible to the AD5934.
The power supply to the AD5934 should be bypassed with 10 F
and 0.1 F capacitors. The capacitors should be physically as
close as possible to the device, with the 0.1 F capacitor ideally
right up against the device. The 10 F capacitors are the tantalum
bead type. It is important that the 0.1 F capacitor has low
effective series resistance (ESR) and effective series inductance
(ESI); common ceramic types of capacitors are suitable. The
0.1 F capacitor provides a low impedance path to ground for
high frequencies caused by transient currents due to internal
logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and reduce glitch
effects on the supply line. Clocks and other fast switching digital
signals should be shielded from other parts of the board by
digital ground. Avoid crossover of digital and analog signals
if possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce feed-
through effects on the board. The best board layout technique
is the microstrip technique where the component side of the board
is dedicated to the ground plane only and the signal traces are
placed on the solder side. However, this is not always possible
with a 2-layer board.
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