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參數(shù)資料
| 型號： | EVAL-AD5543SDZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR AD5543 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 設(shè)置時間： | 500ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD5543 |
Data Sheet
AD5543/AD5553
Rev. F | Page 9 of 20
CIRCUIT OPERATION
The AD5543/AD5553 contain 16-/14-bit current output, DACs,
serial input registers, and DAC registers. Both converters use a
3-wire serial data interface.
DAC SECTION
The DAC architecture uses a current steering R-2R ladder
design. Figure 18 shows the typical equivalent DAC structure.
The DAC contains a matching feedback resistor for use with an
external op amp (see Figure 19). With RFB and IOUT terminals
connected to the op amp output and inverting node, respectively,
a precision voltage output is achieved as
VOUT = VREF × D/65,536 (AD5543)
(1)
VOUT = VREF × D/16,384 (AD5553)
(2)
Note that the output voltage polarity is the opposite of the VREF
polarity for dc reference voltages.
These DACs are designed to operate with either negative or
positive reference voltages. The VDD power pin is only used
by the internal logic to drive the on and off states of the DAC
switches.
VREF
VDD
RFB
IOUT
R
GND
2R
S1
S2
DIGITAL INTERFACE CONNECTIONS OMITTED FOR CLARITY;
SWITCHES S1 AND S2 ARE CLOSED, VDD MUST BE POWERED.
5k
R
02917-
018
Figure 18. Equivalent R-2R DAC Circuit
Note that a matching switch is used in series with the internal
5 kΩ feedback resistor. If users attempt to measure RFB, power
must be applied to VDD to achieve continuity.
02917-
019
RFB
IOUT1
GND
SCLK SDIN
VREF
R1
SYNC
AD5543/
AD5553
VDD
AGND
C1
A1
R2
VOUT = 0 TO –VREF
CONTROLLER
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (4pF TO 6pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
Figure 19. Voltage Output Configuration
These DACs are also designed to accommodate ac reference
input signals. The AD5543 accommodates input reference
voltages in the range of 12 V to +12 V. The reference voltage
inputs exhibit a constant nominal input resistance value of 5 k
± 30%. The DAC output (IOUT) is code dependent, producing
various resistances and capacitances. External amplifier choice
should take into account the variation in impedance generated
by the AD5543 on the inverting input node of the amplifier.
The feedback resistance, in parallel with the DAC ladder
resistance, dominates output voltage noise. To maintain good
analog performance, power supply bypassing of 0.01 F to 0.1 F
ceramic or chip capacitors, in parallel with a 1 F tantalum
capacitor, is recommended. Due to degradation of PSRR in
frequency, users must avoid using switching power supplies.
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| EVAL-AD5546SDZ | 功能描述:BOARD EVAL FOR AD5546 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
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