VDD = 5.5 V, VREF
參數(shù)資料
型號： EVAL-AD5061EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 14/20頁
文件大?。?/td> 0K
描述： BOARD EVALUATION AD5061
產(chǎn)品培訓模塊： DAC Architectures
標準包裝： 1
系列： nanoDAC™
DAC 的數(shù)量： 1
位數(shù)： 16
采樣率（每秒）： 1.3M
數(shù)據(jù)接口： 串行
設(shè)置時間： 4µs
DAC 型： 電壓
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD5061
AD5061
Rev. B | Page 3 of 20
SPECIFICATIONS
VDD = 5.5 V, VREF = 4.096 V, RL = unloaded, CL= unloaded, TMIN to TMAX, unless otherwise specified.
Table 2.
B Grade1
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
16
Bits
Relative Accuracy (INL)2
±0.5
±4
LSB
40°C to +85°C, B grade
±0.5
±4
40°C to +125°C, Y grade
Total Unadjusted Error (TUE)
±0.5
±3.0
mV
40°C to +85°C, B grade
±0.5
±3.0
40°C to +125°C, Y grade
Differential Nonlinearity (DNL)
±0.5
±1
LSB
Guaranteed monotonic, 40°C to +85°C, B grade
±0.5
±1
Guaranteed monotonic, 40°C to +125°C,
Y grade
Gain Error
±0.01
±0.05
% of FSR
TA = 40°C to +85°C, B grade
±0.01
±0.05
TA = 40°C to +125°C , Y grade
Gain Error Temperature Coefficient
1
ppm of FSR/°C
Offset Error
±0.02
±3.0
mV
TA = 40°C to + 85°C, B grade
±0.02
±3.0
TA = 40°C to + 125°C, Y grade
Offset Error Temperature Coefficient
0.5
μV/°C
Full-Scale Error
±0.05
±3.0
mV
All 1s loaded to DAC register,
TA = 40°C to +85°C, B grade
±0.05
±3.0
All 1s loaded to DAC register,
TA = 40°C to +125°C , Y grade
OUTPUT CHARACTERISTICS3
Output Voltage Range
0
VREF
V
Output Voltage Settling Time
4
μs
scale to scale code transition to ±1LSB,
RL = 5 KΩ
Output Noise Spectral Density
64
nV/
√Hz
DAC code = midscale, 1 kHz
Output Voltage Noise
6
μV p-p
DAC code = midscale , 0.1 Hz to 10 Hz bandwidth
Digital-to-Analog Glitch Impulse
2
nV-s
1 LSB change around major carry, RL = 5 KΩ
Digital Feedthrough
0.003
nV-s
DAC code = full-scale
DC Output Impedance (Normal)
0.015
Ω
Output impedance tolerance ±10%
DC Output Impedance (Power-Down)
(Output Connected to 1 kΩ Network)
1
kΩ
Output impedance tolerance ±400 Ω
(Output Connected to 100 kΩ Network)
100
kΩ
Output impedance tolerance ±20 kΩ
Capacitive Load Stability
1
nF
Loads used: RL = 5 kΩ, RL = 100 kΩ, RL = ∞
Output Slew Rate
1.2
V/μs
scale to scale code transition to ±1 LSB,
RL = 5 kΩ, CL = 200 pF
Short-Circuit Current
60
mA
DAC code = full-scale, output shorted to GND,
TA = 25°C
45
mA
DAC code = zero-scale, output shorted to VDD,
TA = 25°C
DAC Power-Up Time
Time to exit power-down mode to normal
mode of AD5061, 24th clock edge to 90% of
DAC final value, output unloaded
DC Power Supply Rejection Ratio
92
dB
VDD ±10%, DAC code = full-scale
Wideband Spurious-Free Dynamic Range
67
dB
Output frequency = 10 kHz
REFERENCE INPUT/OUTPUT
VREF Input Range4
2
VDD 50
mV
Input Current (Power-Down)
±0.1
μA
Zero-scale loaded
Input Current (Normal)
±0.5
μA
DC Input Impedance
1
MΩ
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