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參數(shù)資料
| 型號： | EDI88130LPS17CM |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 17 ns, CDIP32 |
| 封裝： | 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-32 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 499K |
| 代理商： | EDI88130LPS17CM |
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
EDI88130CS
March 2002
Rev. 11
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
DATA RETENTION CHARACTERISTICS (EDI88130LPS Only)
-55°C
≤
T
A
≤
+125°C
Sym
Conditions
Characteristic
Low Power Version only
Data Retention Voltage
Data Retention Quiescent Current
Chip Disable to Data Retention Time (1)
Operation Recovery Time (1)
NOTE:
1. Parameter guaranteed by design, but not tested.
* Read Cycle Time
Min
Typ
Max
Units
V
CC
I
CCDR
T
CDR
T
R
V
CC
= 2.0V
2
–
0
–
–
2
–
–
V
CS1# ≥ V
CC
-0.2V and/or CS2 ≥ V
SS
+0.2V
V
IN
≥ V
CC
-0.2V
or V
IN
≤ 0.2V
0.5
–
–
mA
ns
ns
Tavav*
FIGURE 5 – DATA RETENTION - CS1# CONTROLLED
FIGURE 6 – DATA RETENTION - CS2 CONTROLLED
DATA RETENTION, CS2 CONTROLLED
Data Retention Mode
t
R
Vcc
CS2
t
CDR
CS
2
0.2V
V
CC
4.5V
4.5V
DATA RETENTION, CS1# CONTROLLED
Data Retention Mode
t
R
Vcc
CS1#
t
CDR
CS1# ≥ V
CC
-0.2V
V
CC
4.5V
4.5V
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