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參數(shù)資料
| 型號(hào)： | EDGE4707B |
| 英文描述： | Edge4707B PPMU Settling Time & Stability (224k) |
| 中文描述： | Edge4707B PPMU建立時(shí)間 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 224K |
| 代理商： | EDGE4707B |
2
TEST AND MEASUREMENT PRODUCTS
www .semtech.com
PMU-A2
Edge4707B PPMU
Settling Time and Stability
Revision 1 / November 8, 2002
When making parametric measurements in an ATE system,
it is desirable to have both the fastest possible settling
time as well as the smallest amount of overshoot and
ringing. Unfortunately, this cannot be achieved for several
practical reasons. One is that the optimum compensation
for one range will not be optimal for the other ranges.
Therefore, the optimization must take into account the
differences between the signal behavior on each range
and how often each range will be used in practice. Since
the lowest current range (Range A on the Edge 4707B) is
used primarily for characterizing leakage currents, and
production pass/fail testing of these low currents is often
done on higher current ranges, this range is used the least
in many situations. Therefore, the settling time on this
range can often be sacrificed to get better performance
on other ranges.
There is also a trade-off between faster settling time and
lower overshoot and ringing. The compensation capacitors
which give the fastest settling times also allow the output
to overshoot and ring under some conditions.
This is
mitigated in part because the settling time on the current
measurement (IVMON) output is usually of the greatest
concern (for making measurements), whereas the DUT
node is the point where overshoot is of most concern (too
keep the DUT from being stressed). So the compensation
capacitors can be chosen to give the cleanest possible
signal at the FORCE output and still give good settling
time performance at the IVMON output. Even so, some
compromise will almost always have to be made between
getting the fastest throughput and lowest amount of
overshoot and ringing at the DUT.
The settling time and overshoot/stability characteristics of
this circuit will be dealt with separately.
Settling time
behavior will be addressed first and then stability concerns
will be discussed at the end of this paper.
Components of Settling Time Behavior
Settling time and stability in the Edge 4707B (and similar
PPMU’s) depends on many variables. The magnitude of
the voltage step, the capacitance present on the FORCE/
SENSE output node, the source impedance of the driver
circuit (which is dominated by the resistance of the current
sense resistor), and the desired accuracy of the final
measurement all factor heavily in determining the output
waveform characteristics.
Settling time can be broken down into three components:
1) Delay time from when the input (either analog or digital)
changes to when the output begins to respond, 2) slew
time (when the output is changing at its maximum rate),
and 3) final settling. The effect of these components and
how to minimize their effect will each be discussed in
separate sections below.
Delay Time Component
The response time to changing input conditions is usually
negligible. The only time this is not the case is when one
of the amplifiers has been driven to the power supply rail.
The most common case is when the feedback loop is
broken for some reason, such as if the load impedance
requires more current than the PPMU driver can supply in
force voltage mode, or if the load impedance is too high
in force current mode, etc. In either of these cases the
driver amplifier output goes to the positive or negative
rail. The recovery time from this condition is typically 35
s,
which is not much different from the settling times on the
highest ranges, C and D (and even B for small voltage
steps). This can significantly increase the settling time if
it is allowed to occur.
The best solution is to ensure that the part is operated so
the internal driver amplifier never goes to the rails. This is
done, in part, by always putting the Edge4707B into high
impedance mode (HiZ true) whenever the operating mode
or range is changed. It is also important to be sure that
the output current range is sufficient to supply the current
being drawn by the DUT. If the amount of current draw is
extremely variable, it is quicker to start with a higher current
range and switch down as necessary rather than to start
at a lower current range and switch to a higher current
range.
Changing input voltages can also send the driver amplifier
output to the rail. This is most likely to occur with large
step sizes, fast input slew rates and large load
capacitances. This means that the amount of capacitance
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