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6
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PMU-A2
Edge4707B PPMU
Settling Time and Stability
Revision 1 / November 8, 2002
Figure 6. 0.1% IVMON Settling Time vs. Voltage Step Amplitude on Force Output
(COMP1-2 = 22 pF, COMP4 = 47 pF, 100 pF Load Capacitance on Force Output)
10
100
1000
10000
2.E+00
3.E+00
4.E+00
5.E+00
6.E+00
7.E+00
8.E+00
9.E+00
1.E+01
Step size (Volts)
Range A
Range B
Range C
Range D
Final Settling/Small Signal Component
The small signal portion of the settling time is the period
when the output voltage is in the vicinity of the final voltage,
and the slew rate is decreasing as the output voltage
approaches it’s final value. How long this period is depends
on the amount of accuracy desired. Settling times to
12-bit accuracy (0.025%) can take much longer than
settling to only 1% accuracy. In this paper, a settling time
accuracy of 0.1% of full scale is used as a common
standard.
In general, the 12-bit settling times of the
Edge4707B are not much longer than the 0.1% settling
times, except on Range A, which can be considerably
longer due to the R-C time constant caused by the large
sense resistor.
The small signal portion of the settling time is the one
which is most effected by the compensation capacitors.
In general, the settling time increases both when the
selected compensation capacitors cause a significant
amount of overshoot and ringing, or when the capacitors
are so large that there is a slow and smooth approach to
the final voltage. Finding compensation capacitor values
which cause very little ringing, then increasing their values
so the ringing is just barely eliminated will generally give
the optimum settling times. Unfortunately, as mentioned
earlier, the optimum values will be different for each current
range, so compromise values must be selected.
The
following discussion explains the causes of the ringing and
the effect of the different compensation capacitors on the
ringing and small signal settling times.
The condition when the output has some overshoot and
ringing is called underdamped. This is the case where the
compensation capacitors are smaller than optimum. The
condition where the output approaches the final value
slowly (with no overshoot or ringing) is called overdamped.
In this case the compensation capacitors provide much
more feedback than is needed, so the output responds
slower than optimum. The ideal case is referred to as
critically damped.
This is when the compensation
capacitors are just large enough to keep the circuit from
ringing.