參數(shù)資料
型號(hào)： EDE5108AJBG
廠商： Elpida Memory, Inc.
英文描述： 512M bits DDR2 SDRAM
中文描述： 512M比特DDR2 SDRAM內(nèi)存
文件頁數(shù)： 49/77頁
文件大小： 589K
代理商： EDE5108AJBG
EDE5108AJBG, EDE5116AJBG
Preliminary Data Sheet E1044E20 (Ver. 2.0)
49
Burst Mode Operation
Burst mode operation is used to provide a constant flow of data to memory locations (write cycle), or from memory
locations (read cycle). The parameters that define how the burst mode will operate are burst sequence and burst
length. DDR2 SDRAM supports 4 bits burst and 8bits burst modes only. For 8 bits burst mode, full interleave
address ordering is supported, however, sequential address ordering is nibble based for ease of implementation.
The burst type, either sequential or interleaved, is programmable and defined by the address bit 3 (A3) of the MRS,
which is similar to the DDR-I SDRAM operation. Seamless burst read or write operations are supported.
Unlike DDR-I devices, interruption of a burst read or writes operation is limited to ready by Read or Write by Write at
the boundary of Burst 4. Therefore the burst stop command is not supported on DDR2 SDRAM devices.
[Burst Length and Sequence]
Burst length
Starting address (A2, A1, A0) Sequential addressing (decimal)
Interleave addressing (decimal)
000
0, 1, 2, 3
0, 1, 2, 3
001
1, 2, 3, 0
1, 0, 3, 2
010
2, 3, 0, 1
2, 3, 0, 1
4
011
3, 0, 1, 2
3, 2, 1, 0
000
0, 1, 2, 3, 4, 5, 6, 7
0, 1, 2, 3, 4, 5, 6, 7
001
1, 2, 3, 0, 5, 6, 7, 4
1, 0, 3, 2, 5, 4, 7, 6
010
2, 3, 0, 1, 6, 7, 4, 5
2, 3, 0, 1, 6, 7, 4, 5
011
3, 0, 1, 2, 7, 4, 5, 6
3, 2, 1, 0, 7, 6, 5, 4
100
4, 5, 6, 7, 0, 1, 2, 3
4, 5, 6, 7, 0, 1, 2, 3
101
5, 6, 7, 4, 1, 2, 3, 0
5, 4, 7, 6, 1, 0, 3, 2
110
6, 7, 4, 5, 2, 3, 0, 1
6, 7, 4, 5, 2, 3, 0, 1
8
111
7, 4, 5, 6, 3, 0, 1, 2
7, 6, 5, 4, 3, 2, 1, 0
Note: Page length is a function of I/O organization and column addressing
16M bits
×
8 organization (CA0 to CA9); Page Length = 1024 bits
8M bits
×
16 organization (CA0 to CA9); Page Length = 1024 bits
相關(guān)PDF資料
PDF描述
EDE5108AJBG-6E-E 512M bits DDR2 SDRAM
EDE5108AJBG-8E-E 512M bits DDR2 SDRAM
EDE5116AJBG 512M bits DDR2 SDRAM
EDE5116AJBG-6E-E 512M bits DDR2 SDRAM
EDE5116AJBG-8E-E 512M bits DDR2 SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDE5108AJBG-1J 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJBG-1J-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJBG-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJBG-8E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJSE 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
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