參數(shù)資料
型號(hào)： EDE5108AJBG-6E-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 512M bits DDR2 SDRAM
中文描述： 64M X 8 DDR DRAM, 0.45 ns, PBGA60
封裝： ROHS COMPLIANT, FBGA-60
文件頁(yè)數(shù)： 66/77頁(yè)
文件大?。?/td> 589K
代理商： EDE5108AJBG-6E-E
EDE5108AJBG, EDE5116AJBG
Preliminary Data Sheet E1044E20 (Ver. 2.0)
66
Self Refresh Command [SELF]
The DDR2 SDRAM device has a built-in timer to accommodate self-refresh operation. The self-refresh command is
defined by having /CS, /RAS, /CAS and CKE held low with /WE high at the rising edge of the clock.
ODT must be turned off before issuing self-refresh command, by either driving ODT pin low or using EMRS
command. Once the command is registered, CKE must be held low to keep the device in self-refresh mode.
When the DDR2 SDRAM has entered self-refresh mode all of the external signals except CKE, are “don’t care”.
The clock is internally disabled during self-refresh operation to save power. The user may change the external clock
frequency or halt the external clock one clock after Self-Refresh entry is registered, however, the clock must be
restarted and stable before the device can exit self-refresh operation. Once self-refresh exit command is registered,
a delay equal or longer than the tXSNR or tXSRD must be satisfied before a valid command can be issued to the
device. CKE must remain high for the entire self-refresh exit period tXSRD for proper operation. NOP or deselect
commands must be registered on each positive clock edge during the self-refresh exit interval. ODT should also be
turned off during tXSRD.
Notes: 1. Device must be in the “All banks idle” state prior to entering self refresh mode.
2. ODT must be turned off tAOFD before entering self refresh mode, and can be turned on again
when tXSRD timing is satisfied.
3. tXSRD is applied for a read or a read with autoprecharge command.
4. tXSNR is applied for any command except a read or a read with autoprecharge command.
Self Refresh Command
Comand
CK
T0
T2
T1
Tm
Tn
CKE
T3
T4
T5
ODT
T6
tAOFD
/CK
≥
tXSNR
≥
tXSRD
tRP*
tCK
tCH tCL
tIS
tIS
tIS
tIS tIH
Valid
NOP
NOP
SELF
NOP
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參數(shù)描述
EDE5108AJBG-8E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJSE 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
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EDE5108AJSE-8E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
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