參數(shù)資料
型號： EDE5108AJBG-6E-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 512M bits DDR2 SDRAM
中文描述： 64M X 8 DDR DRAM, 0.45 ns, PBGA60
封裝： ROHS COMPLIANT, FBGA-60
文件頁數(shù)： 19/77頁
文件大小： 589K
代理商： EDE5108AJBG-6E-E
EDE5108AJBG, EDE5116AJBG
Preliminary Data Sheet E1044E20 (Ver. 2.0)
19
6. tJIT (cc) is defined as the absolute difference in clock period between two consecutive clock cycles:
tJIT (cc) = Max. of |tCK
j+1
tCK
j
|
tJIT (cc) is defines the cycle to cycle jitter when the DLL is already locked. tJIT (cc, lck) uses the same
definition for cycle to cycle jitter, during the DLL locking period only. tJIT (cc) and tJIT (cc, lck) are not
subject to production test.
7. tERR (nper) is defined as the cumulative error across multiple consecutive cycles from tCK (avg).
tERR (nper) is not subject to production test.
))
(
)
(
1
avg
tCK
n
tCKj
nper
tERR
j
×
=
∑
=
2
≤
n
≤
50 for tERR (nper)
8. These parameters are specified per their average values, however it is understood that the following
relationship between the average timing and the absolute instantaneous timing hold at all times.
(minimum and maximum of spec values are to be used for calculations in the table below.)
Parameter
Symbol
min.
max.
Unit
Absolute clock period
Absolute clock high pulse
width
Absolute clock low pulse
width
Example: For DDR2-667, tCH(abs) min. = ( 0.48
×
3000 ps ) - 125ps = 1315ps
tCK (abs)
tCK (avg) min. + tJIT (per) min.
tCH (avg) min.
×
tCK (avg) min.
+ tJIT (duty) min.
tCL (avg) min.
×
tCK (avg) min.
+ tJIT (duty) min.
tCK (avg) max. + tJIT (per) max. ps
tCH (avg) max.
×
tCK (avg) max.
+ tJIT (duty) max.
tCL (avg) max.
×
tCK (avg) max.
+ tJIT (duty) max.
tCH (abs)
ps
tCL (abs)
ps
相關(guān)PDF資料
PDF描述
EDE5108AJBG-8E-E 512M bits DDR2 SDRAM
EDE5116AJBG 512M bits DDR2 SDRAM
EDE5116AJBG-6E-E 512M bits DDR2 SDRAM
EDE5116AJBG-8E-E 512M bits DDR2 SDRAM
EDE702 Serial LCD Interface IC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDE5108AJBG-8E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJSE 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJSE-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108AJSE-8E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM
EDE5108GASA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR-II SDRAM
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*