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參數(shù)資料
| 型號： | EDE5108AJBG-6E-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 512M bits DDR2 SDRAM |
| 中文描述： | 64M X 8 DDR DRAM, 0.45 ns, PBGA60 |
| 封裝： | ROHS COMPLIANT, FBGA-60 |
| 文件頁數(shù)： | 52/77頁 |
| 文件大?。?/td> | 589K |
| 代理商： | EDE5108AJBG-6E-E |
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EDE5108AJBG, EDE5116AJBG
Preliminary Data Sheet E1044E20 (Ver. 2.0)
52
Enabling a read command at every other clock supports the seamless burst read operation. This operation is
allowed regardless of same or different banks as long as the banks are activated.
READ
NOP
READ
/CK
CK
T0
T2
T4
T6
T8
T10
T1
T3
T5
T7
T9
T11
Command
DQS, /DQS
DQ
NOP
RL = 4
Burst interrupt is only
allowed at this timing.
out
A0
out
A1
out
A2
out
A3
out
B0
out
B1
out
B2
out
B3
out
B4
out
B5
out
B6
out
B7
A
B
Burst Read Interrupt by Read
Notes: 1. Read burst interrupt function is only allowed on burst of 8. burst interrupt of 4 is prohibited.
2. Read burst of 8 can only be interrupted by another read command. Read burst interruption by write
command or precharge command is prohibited.
3. Read burst interrupt must occur exactly two clocks after previous read command. any other read burst
interrupt timings are prohibited.
4. Read burst interruption is allowed to any bank inside DRAM.
5. Read burst with auto precharge enabled is not allowed to interrupt.
6. Read burst interruption is allowed by another read with auto precharge command.
7. All command timings are referenced to burst length set in the mode register. They are not referenced to
actual burst. For example, minimum read to precharge timing is AL + BL/2 where BL is the burst length
set in the mode register and not the actual burst (which is shorter because of interrupt).
相關PDF資料 |
PDF描述 |
|---|---|
| EDE5108AJBG-8E-E | 512M bits DDR2 SDRAM |
| EDE5116AJBG | 512M bits DDR2 SDRAM |
| EDE5116AJBG-6E-E | 512M bits DDR2 SDRAM |
| EDE5116AJBG-8E-E | 512M bits DDR2 SDRAM |
| EDE702 | Serial LCD Interface IC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EDE5108AJBG-8E-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5108AJSE | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5108AJSE-6E-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5108AJSE-8E-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR2 SDRAM |
| EDE5108GASA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits DDR-II SDRAM |
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