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參數(shù)資料
| 型號： | EB402 |
| 英文描述： | EB402 Evaluation Board user＇s guide 7/01 |
| 中文描述： | EB402評估板用戶指南7月1日 |
| 文件頁數(shù)： | 37/84頁 |
| 文件大?。?/td> | 1014K |
| 代理商： | EB402 |
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3-20
Hardware Overview
3.4.1 Internal Memory
The LSI402ZX has a 2 Kword boot ROM that provides start-up and self-
test capabilities, 62 Kwords of internal instruction (program) memory, and
62 Kwords of internal data memory. Refer to LSI402ZX Digital Signal
Processor User’s Guide for a comprehensive explanation of the
LSI402ZX memory architecture.
3.4.2 External Memory and Memory-Mapped Peripherals
The EB402 provides external memory space that is accessible to the
LSI402ZX through its XBUS interface. The LSI402ZX can address up to
2 Mwords of external memory. External memory may be on-or off-board.
External memory space may be used for instruction memory, data
memory, or peripherals. In general, on-board jumpers map the memory
as instruction space, data space, or peripheral space. These jumper
settings are documented in Section 5.1, “EB402 Jumpers,” page 5-2.
The Evaluation Board has SBSRAM, ash memory, SRAM, an EEI, and
a UART that are mapped into the LSI402ZX memory space. The EEI
buffers the XBUS signals and permits it to interface with off-board
memory. Figure 3.8 shows how the external memory is congured.
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