參數(shù)資料
型號： EB402
英文描述： EB402 Evaluation Board user＇s guide 7/01
中文描述： EB402評估板用戶指南7月1日
文件頁數(shù)： 10/84頁
文件大?。?/td> 1014K
代理商： EB402
2-2
Installation
Figure 2.1
Board Layout
2.2 Preparing to Install the Evaluation Board
Prepare to install the EB402 by following this procedure:
1.
Using appropriate antistatic measures to prevent electrostatic
discharge (ESD) damage, unpack the PCB and the other components.
2.
Verify that you have received all the components. Refer to
Section 1.4, “Packing List” on page 1-5, for the contents of the EB402
package. Inspect the components to verify that none are damaged.
If any components are missing or damaged, contact LSI Logic
Corporation or your LSI Logic manufacturer’s representative.
BD-EBM_CODEC-1 Module
J1
PLL OUT
J4
PLL
REF IN
JP1
CLKIN
J6
HPI
JP22
A17
1
19
20
J3
2
1
A
T
E
K
R
510
15
16
A18
TP7
TP6
1.8V
TP5
1
3
S2
1
BYP
OPEN
JP12
J8
1
EXT A/D
J11
PLLSEL
SPOR
T0
EXT
CNTL
1
3
JP21
A16
JP20
FPV
JP15
IOGND
TP8
3.3V
CGND
1
3
0
1
2
3
2
4
5
6
JP18
XBOOT
1
3
F
A
JP19
D3-XEN
JP17
D2-F
JP16
D1-A
JP14
D0-SB
JP13
IC1-A
LSB
MSB
LD1
LED1
LD3
LD4
LD5
LD6
LD7
LD8
LD9
LD10
LD11
LD12
LD13
LD14
LD15
LD16
LD2
LSI402ZX
1
2
13 14
15 16
3.3V
LED2
LED3
1.8V
SELFTEST
PIO
PIN1-2(0)
PIN2-3(1)
2
SPOR
T1
OFF
J9
R11
VR1
S3
ON
JTAG
J7
J5
JP5 JP6 JP7 JP8 JP9 JP10 JP11
U5
4
1
S1
RESET
3
2
JP2
JP3
JP4
4
1
S4
INT 0
R12
J10
1
0
C4
8
1
19
J2
EB402 S/N 134-30
REV 2/2.1
SN:
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