參數(shù)資料
型號: DZPD6710VCB
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: ISA-to-PC-Card (PCMCIA) Controllers
中文描述: PCMCIA BUS CONTROLLER, PQFP144
封裝: LQFP-144
文件頁數(shù): 83/138頁
文件大?。?/td> 723K
代理商: DZPD6710VCB
ISA-to-PC-Card (PCMCIA) Controllers
PD6710/
22
Datasheet
83
10.7.6
Extension Control 2
(PD6722 only)
Bit 5
Active-high GPSTB
Bit 4
GPSTB on IOW*
(PD6722 only)
Note that setting this bit forces the pull-ups on A_GPSTB (PD6722) to be off, independent of the
setting of the Pull-Up Control bit (index 2Fh, extended index 03h, bit 5). See
External Data
(PD6722 only, Socket A, Index 6Fh)
on page 82
,
Using GPSTB Pins for External Port Control
(PD6722 only)
on page 91
, and
VS1# and VS2# Voltage Detection
on page 95
.
Bit 3
GPSTB on IOR*
(PD6722 only)
Note that setting this bit forces the pull-ups on B_GPSTB (PD6722) to be off, independent of the
setting of the Pull-Up Control bit (index 6Fh, extended index 03h, bit 5). See
External Data
(PD6722 only, Socket A, Index 6Fh)
,
Using GPSTB Pins for External Port Control (PD6722
only)
, and
VS1# and VS2# Voltage Detection
.
Bit 2
Totem-pole GPSTB
When GPSTB outputs are totem-pole, their
high
level is driven to the level of the +5V pin,
instead of high-impedance.
Register Name:
Extension Control 2
Index:
2Fh
Extended Index:
0Bh
Register Per:
socket
Register Compatibility Type:
ext.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reserved
Active-high
GPSTB
GPSTB on
IOW*
GPSTB on
IOR*
Totem-pole
GPSTB
Reserved
RW:00
RW:0
RW:0
RW:0
RW:0
RW:00
0
GPSTB ouputs are active-low.
1
GPSTB ouputs are active-high.
0
A_GPSTB (PD6722) pins are used as voltage sense.
1
A_GPSTB (PD6722) pins are used to strobe I/O writes on SD[15:8].
0
B_GPSTB (PD6722) pins (socket B) are used as voltage sense.
1
B_GPSTB (PD6722) pins are used to strobe I/O reads on SD[15:8].
0
GPSTB ouputs are open-collector.
1
GPSTB ouputs are totem-pole.
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