參數(shù)資料
型號: DZPD6710VCB
廠商: INTEL CORP
元件分類: 總線控制器
英文描述: ISA-to-PC-Card (PCMCIA) Controllers
中文描述: PCMCIA BUS CONTROLLER, PQFP144
封裝: LQFP-144
文件頁數(shù): 61/138頁
文件大小: 723K
代理商: DZPD6710VCB
ISA-to-PC-Card (PCMCIA) Controllers
PD6710/
22
Datasheet
61
Index
Ah
Eh
System I/O Map End Address Low
System I/O Map 0 End Address Low
System I/O Map 1 End Address Low
Bits 7:0
End Address 7:0
This register contains the least-significant byte of the address that specifies the termination of the I/
O space within the corresponding I/O map. I/O accesses that are equal or below this address and
equal or above the corresponding System I/O Map Start Address will be mapped into the I/O space
of the corresponding PC Card.
The most-significant byte is located in the
System I/O Map 0
1 End Address High
register (see
System I/O Map 0
1 End Address High
on page 61
).
8.5
System I/O Map 0
1 End Address High
There are two separate System I/O Map End Address High registers, each with
identical fields. These registers are located at the following indexes:
Index
Bh
Fh
System I/O Map End Address High
System I/O Map 0 End Address High
System I/O Map 1 End Address High
Bits 15:8
End Address 15:8
This register contains the most-significant byte of the End Address. See the description of the End
Address field associated with bits 7:0 of the
System I/O Map 0
1 End Address Low
register (see
System I/O Map 0
1 End Address Low
on page 60
).
Register Name:
System I/O Map 0
1 End Address High
Index:
0Bh, 0Fh
Register Per:
socket
Register Compatibility Type:
365
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
End Address 15:8
RW:00000000
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