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參數(shù)資料
| 型號： | DSP56858FVE |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 11/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 16BIT 120MHZ 144-LQFP |
| 標準包裝： | 60 |
| 系列： | 568xx |
| 核心處理器： | 56800E |
| 芯體尺寸： | 16-位 |
| 速度： | 120MHz |
| 連通性： | EBI/EMI，SCI，SPI，SSI |
| 外圍設(shè)備： | DMA，POR，WDT |
| 輸入/輸出數(shù)： | 47 |
| 程序存儲器容量： | 80KB（40K x 16） |
| 程序存儲器類型： | SRAM |
| RAM 容量： | 24K x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.62 V ~ 1.98 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
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Introduction
56858 Technical Data, Rev. 6
Freescale Semiconductor
19
STD1
GPIOD0
E8
99
Output
Input/Output
ESSI Transmit Data (STD1)—This output pin transmits serial data
from the ESSI Transmitter Shift Register.
Port D GPIO (0)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SRD1
GPIOD1
E11
100
Input
Input/Output
ESSI Receive Data (SRD1)—This input pin receives serial data and
transfers the data to the ESSI Receive Shift Register.
Port D GPIO (1)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SCK1
GPIOD2
E9
101
Input/Output
Input/Output
ESSI Serial Clock (SCK1)—This bidirectional pin provides the serial
bit rate clock for the transmit section of the ESSI. The clock signal can
be continuous or gated and can be used by both the transmitter and
receiver in synchronous mode.
Port D GPIO (2)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC10
GPIOD3
D10
102
Input/Output
Input/Output
ESSI Serial Control Pin 0 (SC10)—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin will be used for the receive
clock I/O. For synchronous mode, this pin is used either for
transmitter1 output or for serial I/O flag 0.
Port D GPIO (3)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC11
GPIOD4
D11
103
Input/Output
Input/Output
ESSI Serial Control Pin 1 (SC11)—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin is the receiver frame sync I/O.
For synchronous mode, this pin is used either for transmitter2 output
or for serial I/O flag 1.
Port D GPIO (4)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC12
GPIOC5
C11
104
Input/Output
Input/Output
ESSI Serial Control Pin 2 (SC12)—This pin is used for frame sync
I/O. SC02 is the frame sync for both the transmitter and receiver in
synchronous mode and for the transmitter only in asynchronous mode.
When configured as an output, this pin is the internally generated
frame sync signal. When configured as an input, this pin receives an
external frame sync signal for the transmitter (and the receiver in
synchronous operation).
Port D GPIO (5)—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
BGA
Pin No.
LQFP
Pin No.
Type
Description
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| DSP56858PB_D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:56858 Digital Signal Processor Product Brief |
| DSP56858VF120 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 120Mhz/120MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| DSP5685XEVMUM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Feature Phone Software Application Product Brief |
| DSP5685XSFPPB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Feature Phone Software Application |
| DSP5685XUM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers |
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