參數(shù)資料
型號(hào)： DSP56857BUE
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 18/53頁(yè)
文件大?。?/td> 0K
描述： IC DSP 16BIT 120MHZ 100-LQFP
標(biāo)準(zhǔn)包裝： 90
系列： 568xx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 120MHz
連通性： SCI，SPI，SSI
外圍設(shè)備： DMA，POR，WDT
輸入/輸出數(shù)： 47
程序存儲(chǔ)器容量： 80KB（40K x 16）
程序存儲(chǔ)器類型： SRAM
RAM 容量： 24K x 16
電壓 - 電源 (Vcc/Vdd)： 1.62 V ~ 1.98 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤
Supply Voltage Sequencing and Separation Cautions
56857 Technical Data, Rev. 6
Freescale Semiconductor
25
4.3 Supply Voltage Sequencing and Separation Cautions
Figure 4-2 shows two situations to avoid in sequencing the VDD and VDDIO, VDDA supplies.
Note: 1. VDD rising before VDDIO, VDDA
2. VDDIO, VDDA rising much faster than VDD
Figure 4-2 Supply Voltage Sequencing and Separation Cautions
VDD should not be allowed to rise early (1). This is usually avoided by running the regulator for the VDD
supply (1.8V) from the voltage generated by the 3.3V VDDIO supply, see Figure 4-3. This keeps VDD from
rising faster than VDDIO.
VDD should not rise so late that a large voltage difference is allowed between the two supplies (2).
Typically this situation is avoided by using external discrete diodes in series between supplies, as shown
in Figure 4-3. The series diodes forward bias when the difference between VDDIO and VDD reaches
approximately 2.1, causing VDD to rise as VDDIO ramps up. When the VDD regulator begins proper
operation, the difference between supplies will typically be 0.8V and conduction through the diode chain
reduces to essentially leakage current. During supply sequencing, the following general relationship
should be adhered to:
VDDIO > VDD > (VDDIO - 2.1V)
In practice, VDDA is typically connected directly to VDDIO with some filtering.
Figure 4-3 Example Circuit to Control Supply Sequencing
3.3V
1.8V
Time
0
2
1
Supplies Stable
VDD
VDDIO, VDDA
DC
Po
we
rSu
pply
V
olt
age
3.3V
Regulator
1.8V
Regulator
Supply
VDD
VDDIO, VDDA
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