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參數(shù)資料
型號(hào): DSP56303AG100B1
廠商: Freescale Semiconductor
文件頁數(shù): 48/108頁
文件大小: 0K
描述: IC DSP 24BIT 100MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 300
系列: DSP563xx
類型: 定點(diǎn)
接口: 主機(jī)接口,SSI,SCI
時(shí)鐘速率: 100MHz
非易失內(nèi)存: ROM(576 B)
芯片上RAM: 24kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
DSP56303 Technical Data, Rev. 11
2-24
Freescale Semiconductor
Specifications
2.5.5.3 Synchronous Timings
Table 2-13.
External Bus Synchronous Timings1,2
No.
Characteristics
Expression3,4,5
100 MHz
Unit
Min
Max
198
CLKOUT high to address, and AA valid
6
0.25
× TC + 4.0
6.5
ns
199
CLKOUT high to address, and AA invalid6
0.25
× T
C
2.5
ns
200
TA valid to CLKOUT high (set-up time)
4.0
ns
201
CLKOUT high to TA invalid (hold time)
0.0
ns
202
CLKOUT high to data out active
0.25
× TC
2.5
ns
203
CLKOUT high to data out valid
0.25
× T
C + 4.0
6.5
ns
204
CLKOUT high to data out invalid
0.25
× TC
2.5
ns
205
CLKOUT high to data out high impedance
0.25
× T
C
—2.5
ns
206
Data in valid to CLKOUT high (set-up)
4.0
ns
207
CLKOUT high to data in invalid (hold)
0.0
ns
208
CLKOUT high to RD assertion
maximum: 0.75
× TC + 2.5
6.7
10.0
ns
209
CLKOUT high to RD deassertion
0.0
4.0
ns
210
CLKOUT high to WR assertion
2
maximum: 0.5
× TC + 4.3
for WS = 1 or WS
≥ 4
for 2
≤WS ≤3
5.0
0.0
9.3
4.3
ns
211
CLKOUT high to WR deassertion
0.0
3.8
ns
Notes:
1.
Use external bus synchronous timings only for reference to the clock and
not for relative timings.
2.
Synchronous Bus Arbitration is not recommended. Use Asynchronous mode whenever possible.
3.
WS is the number of wait states specified in the BCR.
4.
If WS > 1, WR assertion refers to the next rising edge of CLKOUT.
5.
Use the expression to compute the maximum or minimum value listed, as appropriate. For timing 210, the minimum is an
absolute value.
6.
T198 and T199 are valid for Address Trace mode if the ATE bit in the Operating Mode Register is set. when this mode is
enabled, use the status of BR (See T212) to determine whether the access referenced by A[0–17] is internal or external.
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