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參數(shù)資料
| 型號： | DS89C450 |
| 英文描述： | Ultra-High-Speed Flash Microcontrollers |
| 中文描述： | 超高速閃存微控制器 |
| 文件頁數(shù)： | 7/48頁 |
| 文件大小： | 934K |
| 代理商： | DS89C450 |
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DS89C430/DS89C440/DS89C450
7 of 48
Note 15:
The clock divide and crystal multiplier control bits in the PMR register determine the system clock frequency and the minimum/
maximum external clock speed. The term “1/t
CLCL
” used in the
AC Characteristics
variable timing table is determined from the
following table. The minimum/maximum external clock speed columns clarify that [(external clock speed) x (multipliers)] cannot
exceed the rated speed of the device. In addition, the use of the crystal multiplier feature establishes a minimum external speed.
External Clock Speed
4X/
2X
CD1
CD0
Number of External Clock
Cycles per System Clock
(1/t
CLCL
)
1
2
Reserved
4
1/1024
Min
Max
1
0
X
X
X
0
0
0
1
1
0
0
1
0
1
10MHz
5MHz
—
8.25MHz
16.5MHz
—
See AC Characteristics
See AC Characteristics
See AC Characteristics
See AC Characteristics
Note 16:
External MOVX instruction times are dependent upon the setting of the MD2, MD1, and MD0 bits in the clock control register. The
terms “t
STC1
, t
STC2
, t
STC3
” used in the variable timing table above are calculated through the use of the table given below.
MD2
0
0
0
0
1
1
1
1
MD1
0
0
1
1
0
0
1
1
MD0
0
1
0
1
0
1
0
1
MOVX Instruction Time
2 Machine Cycles
3 Machine Cycles
4 Machine Cycles
5 Machine Cycles
6 Machine Cycles
7 Machine Cycles
8 Machine Cycles
9 Machine Cycles
t
STC1
0 t
CLCL
2 t
CLCL
6 t
CLCL
10 t
CLCL
14 t
CLCL
18 t
CLCL
22 t
CLCL
26 t
CLCL
t
STC2
0 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
5 t
CLCL
5 t
CLCL
5 t
CLCL
5 t
CLCL
t
STC3
0 t
CLCL
0 t
CLCL
0 t
CLCL
0 t
CLCL
4 t
CLCL
4 t
CLCL
4 t
CLCL
4 t
CLCL
t
STC4
0 t
CLCL
0 t
CLCL
0 t
CLCL
0 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
t
STC5
0 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
1 t
CLCL
Note 17:
Maximum load capacitance (to meet the above timing) for Port 0, ALE,
PSEN
,
WR,
and
RD
is limited to 60pF. XTAL1 and XTAL2 load
capacitance are dependent upon the frequency of the selected crystal.
Figure 1. Nonpage Mode Timing
ALE
Port 0
Port 2
LSB
DATA
XTAL1
PSEN
RD
MSB
MSB
MSB
MSB
MSB
WR
LSB
LSB
LSB
LSB
DATA
MOVX
MOVX
OPCODE
t
CLCL
t
AVLL2
t
AVLL
t
LHLL
t
WLWH
t
LLAX2
t
LLWL
t
LLPL
t
PXIX
t
LLAX
t
LLIV
t
AVIV0
t
PLPH
t
PLIV
t
AVLL3
t
LLAX3
t
RLRH
t
PLAZ
t
WHLH
t
WHQX
t
QVWX
t
AVIV2
t
AVDV2
t
AVWL2
t
PXIZ
t
LLDV
t
AVDV0
t
RHDX
t
RHDZ
t
RLDV
t
AVWL0
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| DS89C450+ENG | 制造商:Maxim Integrated Products 功能描述:MCU 8BIT CISC 64KB FLASH 5V 44TQFP - Trays |
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| DS89C450+QNL | 制造商:Maxim Integrated Products 功能描述:MICRO HI SPD 44PLCC 64K IND PB-FREE - Rail/Tube |
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